FPGA / VHDL Development¶
| Overview | |
| FPGA Development Overview | An Overview of Development for the MitySOM-AM57X FPGA |
| AM57X-FPGA Communication | Information on communications between the AM57X and the FPGA |
| Project Development | |
| FPGA Example Projects | Information on building FPGA Example Projects |
| Building Vivado Example Projects | Information on how to build Vivado Example Projects for the itySOM-AM57X |
| Core Version Register | Information about the fields stored in the Core Version Register VHDL IP |
| Base Module Register | Information about the fields stored in the Base Module Register VHDL IP |
| Utilities | |
| Programming the FPGA Through U-Boot | Information on how to program the FPGA from within U-Boot |
| Programming the FPGA Through JTAG | Information on how to program the FPGA using the JTAG interface |
| Misc | |
| DMA Transfers from an FPGA FIFO | Information on how to use EDMA3 to transfer data from an FPGA FIFO |
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