Activity
From 06/26/2025 to 07/25/2025
07/21/2025
- 04:44 PM MitySOM-C10GX Firmware: RE: Clock on MitySOM-C10G
- On the MitySOM C10G, there is an onboard 100 MHz oscillator connected to FPGA Ball Y15, which has optional function C...
- I am new to FPGA in general so forgive me if this question is simple.
* Which pin/pins are configured in the hardw...
07/08/2025
- 01:53 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Clarification regarding LED 4 on MitySOM-5CSX DevKit
- Hello,
When you refer to the "binary," are you referring to the RBF file used to program the FPGA? If so, are you ... - 01:16 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Clarification regarding LED 4 on MitySOM-5CSX DevKit
- Thank you for your response. I’ve updated the clock pin configuration as suggested.
However, I’m currently facing ...
07/03/2025
- 06:31 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Unable to program FPGA – “MSEL switch is in the wrong position” on MitySOM-5CSX dev kit
- Hello,
We were able to recreate your issue with the app you were using (https://github.com/robseb/rstoolsCY5). Aft...
07/02/2025
- I’m bringing up our new MitySOM-5CSX evaluation board and ran into an issue while trying to load the reference bitstr...
- 03:07 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Clarification regarding LED 4 on MitySOM-5CSX DevKit
- I believe the spreadsheets are correct.
T13 is not connected to a dedicated clock input pin, needed to feed a REFC... - I am posting this on behalf of a customer.
...
06/30/2025
- 10:02 AM MitySOM-AM57X FPGA Development: RE: Requesting the source/origin for the fpga bin in the default image in the sd card provided along with the evk.
- Hello,
It is the same one as documented on the [[FPGA_Example_Projects]] page. The only difference is that the ta... - Hi,
We are working currently with the AM57 devkit with FPGA and using the sd card image provided along with the ev...
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