Activity
From 06/05/2024 to 07/04/2024
07/04/2024
- 07:34 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: Error in u-boot. cyclone v 5CSEBA4U2317 SOM
- Hi Daniel,
 Now am able to generate the boot files.
 Thanks & Regards,
 Bhardwaj
- 07:02 AM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: MitySOM-5csx custom board PL fabric ethernet access
- Hi,
 I donot have much resources, as my application need more resources, I wanted to use HPS EMAC. And I am not going...
07/03/2024
- 02:19 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: MityDSP-L138 Power Draw in Deep Sleep? Waking ARM core from DSP core? Power and Sleep Controller (PSC)
- Michael Bisbano wrote in message#6697:
 > Hi Jonathan,
 > Thank you for the response, please let me know what you fi...
- 01:09 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: oe-layertool-setup.sh script seems to pull and merge when it shouldn't need to
- Ok, I did.
07/02/2024
- 08:46 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: oe-layertool-setup.sh script seems to pull and merge when it shouldn't need to
- I think both of these make a lot of sense. I'd recommend reporting this to TI via the meta-arago mailing list. They...
- 07:16 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: oe-layertool-setup.sh script seems to pull and merge when it shouldn't need to
- while we're at it, why let it complain about detached heads when the config file asked for detached heads?...
- We noticed in our pipeline setup that the oe-layertool-setup.sh script still appeared to be pulling and merging again...
07/01/2024
- 09:16 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: MityDSP-L138 Power Draw in Deep Sleep? Waking ARM core from DSP core? Power and Sleep Controller (PSC)
- Hi Jonathan, 
 Thank you for the response, please let me know what you find out! The system as a whole must be under ...
- 07:05 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: MityDSP-L138 Power Draw in Deep Sleep? Waking ARM core from DSP core? Power and Sleep Controller (PSC)
- Michael Bisbano wrote:
 > Hi all,
 >
 > I was wondering if anyone had data on power draw for the MityDSP-L138 in dee...
- Hi all,
 I was wondering if anyone had data on power draw for the MityDSP-L138 in deep sleep? My application is bat...
- 06:18 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Error in u-boot. cyclone v 5CSEBA4U2317 SOM
- Hello,
 You shouldn't need to update the compiler or path from the default that are filled out by the bsp-editor. D...
- 03:49 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Serial port 2 issue, RS485, RTS drops to early
- Fred Weiser wrote in message#6688:
 > Changing the timer is probably not in my best interest; my project supports dow...
06/30/2024
- 05:51 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Get URL from jenkins file
- Here is a link to the SDK for the 5CSx
 you will need to run it on a linux machine (ubuntu 18 and up recommended)
 ht...
06/29/2024
- 04:42 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: Error in u-boot. cyclone v 5CSEBA4U2317 SOM
- Hi Daniel,
 Thank you for providing the information regarding booting. I understand the process to boot the...
06/28/2024
- 03:59 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Get URL from jenkins file
- If you just need to build the kernel and device tree, you can download the kernel from https://git.criticallink.com/g...
- 01:34 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Error in u-boot. cyclone v 5CSEBA4U2317 SOM
- Hello,
 The Altera Cyclone V SoC boot process involves several steps to initialize and start up the system. The Cyc...
06/27/2024
- 09:06 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Serial port 2 issue, RS485, RTS drops to early
- Changing the timer is probably not in my best interest; my project supports down to 1200 baud with packets up to 256 ...
- 06:12 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Serial port 2 issue, RS485, RTS drops to early
- Here's the snip:...
- 05:45 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Serial port 2 issue, RS485, RTS drops to early
- Looks like wait_for_xmitr has a 10ms timeout, this might explain why the TXEN is enabled for a constant time. At low...
- 04:19 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Serial port 2 issue, RS485, RTS drops to early
- What does your pinmux look like for UART2?
- 03:36 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Serial port 2 issue, RS485, RTS drops to early
- Please see two attached scope traces; the second with a 7 character buffer, the first with a 16 character buffer. I w...
- 02:31 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Serial port 2 issue, RS485, RTS drops to early
- It looks like (in the 3.2 kernel anyway) the only serial port driver that supports the delay_rts_after_send option is...
- 01:46 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Serial port 2 issue, RS485, RTS drops to early
- Thanks for the ideas; I'm looking into the code cited above now; I don't have any new news there at this time. 
 Ho...
- 01:05 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Serial port 2 issue, RS485, RTS drops to early
- My suspicion is that the register read in wait_for_xmitr() is "lying" and the UART is actually still serializing the ...
- 08:47 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: RS485 Direction Control on UART1
- Seems like it could work. Good find.
- 07:17 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: RS485 Direction Control on UART1
- I did come across this application note from TI: https://www.ti.com/lit/ug/tidubw6/tidubw6.pdf?ts=1719509747706
 (if ...
- 05:36 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Error in u-boot. cyclone v 5CSEBA4U2317 SOM
- Hi Daniel,
 I had the tested the booting by the link which you have mentioned. It is working but getting an error ...
- 08:21 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: Get URL from jenkins file
- Hi,
 We need to build the project from provided jenkins file, and further we are going to modify or add avalon in...
06/26/2024
- 06:48 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Get URL from jenkins file
- Hello,
 I believe the Jenkins file you are referring to was provided as a reference and contains internal links to ...
- Hi,
 we have an Jenkins file, but we are new to Jenkins and i am not able to get URL from the Jenkins file. Help m...
06/25/2024
- 09:59 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Serial port 2 issue, RS485, RTS drops to early
- The kernel driver code for RS485 support can be found here: https://support.criticallink.com/gitweb/?p=linux-davinci....
- 06:58 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Serial port 2 issue, RS485, RTS drops to early
- Seems a "paste" didn't work as expected...
 SER_RS485_USE_GPIO is the same as 1<<5
- We are having a problem with serial port ttyS2 on our L138 SoM which I believe resides in the Linux driver or the TI ...
- 04:33 PM MitySOM-AM57X Software Development: RE: Clock, Timer and Power Idle
- Please note that the wiki page "Memory_Overview":https://support.criticallink.com/redmine/projects/mitysom_am57x/wiki...
- 02:01 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: MitySOM-5csx custom board PL fabric ethernet access
- Hello,
 If you want to intergate the data inside the FPGA instead of having the HPS involved you could look into us...
- Hi all, I am working on a project where two ethernet interfaces, are connected through PL fabric, using GMII to RGMII...
06/24/2024
- 08:39 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Error in u-boot. cyclone v 5CSEBA4U2317 SOM
- Hello,
 From the error it looks like the SPL isn't able to correctly read the MBR/Partition table on the SD card. T...
- 08:03 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Error in u-boot. cyclone v 5CSEBA4U2317 SOM
- Hi Daniel,
 Can you please tell me why this error is coming while booting.
 I am facing this issue from last 15 days....
- 02:55 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Does yocto support multiple config fragments?
- Hi Nathan, 
 I just tested multiple config fragments, and everything worked for me. Here is part of the simple conf...
06/21/2024
- 05:25 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: Error in u-boot. cyclone v 5CSEBA4U2317 SOM
- Hello Daniel,
 I will wait for your response. I am working on HPS only at present.
 Thanks,
 Bhardwaj
06/20/2024
- 08:06 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Does yocto support multiple config fragments?
- Hi Nathan, the config fragments are handled by a TI recipe located at sources/meta-ti/meta-ti-bsp/recipes-kernel/linu...
- 07:57 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: RS485 Direction Control on UART1
- How long are you looking for?
 The kernel documentation mentions getting extended distance for rs232 by using UTP c...
- 03:43 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: RS485 Direction Control on UART1
- Hi Jonathan, 
 thanks for the quick response. I will look into the 8250 driver, it might be useful (if only for my ...
- 03:27 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Error in u-boot. cyclone v 5CSEBA4U2317 SOM
- Hello,
 We are currently in the process of updating our instructions for building the FPGA, bootloaders, and filesy...
- Dear sir/madam,
 I am working on cyclone v 5CSEBA4U2317 SOM with custom board. I am u...
06/19/2024
- 07:09 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: RS485 Direction Control on UART1
- The serial 8250 driver has an rs485 mode which we extended to allow using a gpio to generate a RS485 TX enable. Howe...
- Hi all,
 My application requires installation embedded in a battery power system with long wire. I would like acces...
- We got kernel config fragments working, then we set about making more of them.  
 We made small fragments that were...
- 02:44 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Is it possible to use the u-boot binary env file?
- Hi Nathan,
 I have been looking into this but have been unable to add saveenv back in. I'm glad you found a work ar...
- 01:59 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Is it possible to use the u-boot binary env file?
- For posterity, we figured out how to restore u-boot-initial-env text file and then we placed a fake uboot.env file in...
06/14/2024
- I see on e2e.ti.com that some posts imply there might be a way to restore use of saveenv and the binary boot.env file...
06/13/2024
- 11:41 AM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Managing the u-boot environemt, uEnv.txt and fw_setenv
- We are testing simply placing a hook in to bootcmd via the uboot menuconfig, between load environment and booting.
 ...
06/12/2024
- 10:19 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Managing the u-boot environemt, uEnv.txt and fw_setenv
- > Turns out I don't think is what I am looking for. That is for delivering a uEnv file via a swu file, and optionally...
- 07:38 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Managing the u-boot environemt, uEnv.txt and fw_setenv
- Turns out I don't think is what I am looking for. That is for delivering a uEnv file via a swu file, and optionally ...
- 05:40 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Managing the u-boot environemt, uEnv.txt and fw_setenv
- Excellent! Thanks.
- 05:38 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Managing the u-boot environemt, uEnv.txt and fw_setenv
- Hi Nathan,
 TI has removed this functionality in the new 9 sdk, see "here":https://software-dl.ti.com/processor-sdk...
06/11/2024
- Hello,
 It appears that support for u-boot environment has been limited to uEnv.txt. We are trying to use swupdate...
- 08:51 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: suggestion: add parted and mtools to docker-pocky
- Thanks! Specifying -n to identify where the tools are does work.
- 07:19 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: suggestion: add parted and mtools to docker-pocky
- Hi Nathan,
 The Docker-poky script uses the Crops poky docker image (https://hub.docker.com/r/crops/poky), so we do...
- You need them if you want to use the wic tool to inspect wic files that have fat partitions.
 I attach to a running...
06/10/2024
- 11:40 AM MitySOM-AM57X Software Development: RE: Clock, Timer and Power Idle
- Arun Krishnan wrote in message#6643:
 > Solved the error by adding botton lines to to the ipc.cfg
 > var Resource = ...
- 11:39 AM MitySOM-AM57X Software Development: RE: Clock, Timer and Power Idle
- Solved the error  by adding botton lines to to the ipc.cfg
 var Resource = xdc.useModule('ti.ipc.remoteproc.Resource'...
- 10:51 AM MitySOM-AM57X Software Development: RE: Clock, Timer and Power Idle
- When I try to build the application, I am getting the error "error #10056: symbol "ti_ipc_remoteproc_ResourceTable" r...
- 11:08 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: FPGA (FIFO) -> DSP (DMA) transfer problem
- There is a cross-bar that sits between EMIFA on the L138 and the DSP / ARM / peripheral masters.
 When a read reque...
- 07:52 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: FPGA (FIFO) -> DSP (DMA) transfer problem
- Thank you for answer.
 We will conduct the above experiment later.
 Currently, we are trying to increase the RD Clk...
06/07/2024
- 08:55 AM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: AM62A module SODIMM pinout documentation error
- William,
 I see that you have released an update to the datasheet. Unfortunately it is contradicting now. The 3rd c...
06/05/2024
- 09:05 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: FPGA (FIFO) -> DSP (DMA) transfer problem
- Hello, 
 Based on the FPGA code you shared I believe that the primary issue you are having is that your FPGA code r...
- 12:42 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: FPGA (FIFO) -> DSP (DMA) transfer problem
- Thank you for answer.
 As you suggested, read Cache_and_Memory and
 We proceeded by modifying the source as shown bel...
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