Activity
From 07/29/2025 to 08/27/2025
08/27/2025
- MF 09:18 PM FPGA Development: RE: Fail to program device
- Maxim,
Please use the instructions found here for programming the QSPI NOR Flash (from the command line): https://support.criticallink.com/redmine/projects/mitysom_a5/wiki/Building_fpga_242pro
I have not found a way to get the Prog... - Hello
I've just got MitySOM_A5 Dev. Kit and started to work on it.
I'm trying to create my own project based on CriticalLink BASE Example Project (clone from GIT, PRO 24.2 Stable)
The idea is not to use HPS for this project, but FPGA ... - Hello,
I'm trying to create an example design for AXI MCDMA for PCIe. But this IP core is exist in Q25.x versions only.
All the Example Projects provided by CriticalLink are in older versions: Q23.4, Q24.1, Q24.2
Does anyone tried to... - KM 08:51 PM PCB Development: RE: PCIe connection to Computer MB
- however I think the Tx and Rx lines need to be swapped w.r.t. the connector between EP and RP ... we cannot change the direction of the GTS signals on the FPGA.
can you please confirm this point ?
- KM 08:20 PM PCB Development: RE: PCIe connection to Computer MB
- okay I see there are some 0 ohm resistors to feedback the REFCLK+/- (PCIe_CLK) in end point mode... R81 and R83 on carrier board...
is this all that is needed to make the connection into standard motherboard ?
- Hello,
We are working on testing the PCIe interface on the Mighty-Mini Agilex-5E dev kit.
The PCIe x4 connector is a socket (Root Port).
in order to connect this to a standard computer mother board, also RP root port, we are g... - MF 08:28 PM PCB Development: RE: FAN enable
- Keith,
The FAN_EN GPIO can be enabled by exporting the GPIO in sysfs and driving it high. - Hello,
Is there a Linux software command to enable the +5V Fan from the HPS ? or a register we can write to to enable the FAN ?
We see that the SOM PCBA gets relatively hot > +50C, and we do not want to over stress the development...