Mity CPU Platforms

12/19/2025

JC 10:55 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P PCB Development: RE: Fixture to Flash Image in Production

Holden Wozniak wrote:
> We are looking into ways to flash an image onto a SOM with eMMC in production.
> ...
DFU/snagboot was created for this scenario. We'd normally use our devkits to do factory programming but if you wanted to chan... Jonathan Cormier

HW 08:28 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P PCB Development: Fixture to Flash Image in Production

We are looking into ways to flash an image onto a SOM with eMMC in production.
Our current thought was to utilize DFU/Snagboot; we would provide the custom Yocto files and a script to run on a host PC. The host PC would be connected t... Holden Wozniak

12/17/2025

MF 08:29 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: MitySOM-5CSX Dev Kit – USB OTG J401 not detecting USB devices

Hi Atef,
We just doubled checked on our side that the image you mentioned (Yocto (Poky 2.4.4, kernel 5.4.23-yocto-standard)) works as expected on the development kit.
Can you provide what type of USB OTG adapter you are using? We h... Mike Fiorenza

AF 04:41 PM MitySOM-5CSX Altera Cyclone V FPGA Development: MitySOM-5CSX Dev Kit – USB OTG J401 not detecting USB devices

Hello,
I am using a MitySOM-5CSX SOM on the standard Critical Link carrier (development kit) with Yocto (Poky 2.4.4, kernel 5.4.23-yocto-standard). I am trying to validate the USB OTG port J401 in host mode with a USB flash drive.
At b... Anonymous fpga

AF 07:18 AM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Ethernet PHY configuration and SSH access

Hello,
I am using a MitySOM-5CSX SOM on the standard Critical Link carrier (development kit) with Yocto (Poky 2.4.4, kernel 5.4.23-yocto-standard). I am trying to validate the USB OTG port J401 in host mode with a USB flash drive.
At b... Anonymous fpga

12/09/2025

DV 02:54 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Ethernet PHY configuration and SSH access

Hi Atef,
You should be able to do this via ethtool: Daniel Vincelette

AF 02:50 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Ethernet PHY configuration and SSH access

Hi Zach,
Could you please generate a Linux image for the 5CSX-H6-4YA based on the Linux image available at the following link (https://support.criticallink.com/redmine/projects/mityarm-5cs/wiki), but configured so that the Ethernet li... Anonymous fpga

MW 10:25 AM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Ethernet PHY configuration and SSH access

Hello,
For layout, the two groups you have outlined in your schematic snippet should be matched in length and ideally be on the same layer. The clocks should be separated from the data lanes by at least 5x trace width. We usually ... Michael Williamson

AF 08:47 AM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Ethernet PHY configuration and SSH access

Hi Zach,
Just a quick update on my side.
I am now able to communicate over Ethernet with our custom carrier board. However, in some cases I still observe data loss that results in dropped connections. My current suspicion is that thi... Anonymous fpga

AF 08:15 AM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Ethernet PHY configuration and SSH access

Hi Zach,
Thank you for your reply.
I ran ethtool eth0 | grep PHYAD on my system, and it confirms that the PHY is detected at address 3, as shown in the attached screenshot.
Could you please let me know if the Ethernet hardware section... Anonymous fpga

12/08/2025

JC 09:39 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Uart issue in Am62P

Hi Rajkumar,
Just following up Jonathan Cormier

ZM 05:40 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Ethernet PHY configuration and SSH access

Hi Atef,
The image you downloaded should have an SSH server (OpenSSH) running by default, yes. @ps@ by default doesn't show all processes, which is why the grep in your screenshot didn't find it. Running @ps -A@ or @ps aux@ should con... Zachary Miller

AF 03:52 PM MitySOM-5CSX Altera Cyclone V FPGA Development: Ethernet PHY configuration and SSH access

Hello,
I am working with a MitySOM-5CSx module on my own custom carrier board and I am seeing different behavior depending on which SD card image I use. I would appreciate your help to understand the correct configuration.
+*Hardware... Anonymous fpga

12/05/2025

JC 09:55 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: uBoot I2C Speed Command [MityDSP L138]

2019 with i2c mods
Flashing u-boot based on https://support.criticallink.com/redmine/projects/arm9-platforms/wiki/Updating_devkit_to_latest_MDK Jonathan Cormier

JC 09:45 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: uBoot I2C Speed Command [MityDSP L138]

By default the 2019 u-boot doesn't support multiple i2c buses. Though I was able to tweak some code to seemingly get it working, however I don't have devices on i2c1 to determine if its actually working. Jonathan Cormier

JC 09:29 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: uBoot I2C Speed Command [MityDSP L138]

Testing the 2019 u-boot and i2c speed command does appear to be supported though I didn't scope the lines to prove it was changing speeds. Jonathan Cormier

JC 07:47 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Configuring OMAP-L138 peripherals from uBoot

The latest L138 RTOS SDK 06_03_00_106 for the L138 does have documentation for MCASP and a bunch of other peripherals.
https://www.ti.com/tool/PROCESSOR-SDK-OMAPL138#downloads
https://software-dl.ti.com/processor-sdk-rtos/esd/docs/06... Jonathan Cormier

JC 04:17 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Configuring OMAP-L138 peripherals from uBoot

Hi Michael, I created a e2e question asking TI about MCASP support on the DSP. https://e2e.ti.com/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1595231/omap-l138-d... Jonathan Cormier

12/04/2025

MB 08:04 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Configuring OMAP-L138 peripherals from uBoot

Jonathan,
If StarterWare/BareMetal are against the grain, please point me towards DSPBios code/examples that use McASP. Which version of DSP/BIOS are you using? When making a new project in CCS, do you tell CCS to target an OMAP-L138 or... Michael B

JC 07:27 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Configuring OMAP-L138 peripherals from uBoot

Hi Michael, We have only used the DSP with TI's DSPBios RTOS. It should already have abstraction layers for most of those peripherals. Jonathan Cormier

12/03/2025

JC 10:46 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: uBoot I2C Speed Command [MityDSP L138]

Michael B wrote:
> Hi All,
> ...
In the 2009 u-boot, i2c set speed is not implemented. There are provisions for architecture specific implementations but there are none relevant for the L138.
https://support.criticallink.com/gitweb... Jonathan Cormier

MB 09:39 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: uBoot I2C Speed Command [MityDSP L138]

As a follow up, is there any way to test I2C 1 bus through uBoot? Michael B

MB 09:20 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: uBoot I2C Speed Command [MityDSP L138]

Hi All,
I'm in the middle of debugging some I2C issues and was curious how the uBoot i2c speed command is handled. It seems to take/return Hz, does that relate to baud rate, bitrate, or just SCL frequency?
The i2c speed is defaulting... Michael B

MB 09:38 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: Configuring OMAP-L138 peripherals from uBoot

Hi all,
I am interested in running a bare metal application on just the DSP core, and would like some help configuring as many of the peripherals (I2C, McASP, UART, DMA, etc.) from within uBoot instead of in the DSP code initialization.... Michael B

12/02/2025

AF 12:47 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Issue booting encrypted bitstream on MitySOM-5CSx evaluation board

Thanks, it works. Anonymous fpga

12/01/2025

MF 04:20 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Issue booting encrypted bitstream on MitySOM-5CSx evaluation board

Atef,
Can you make sure you have the MSEL set appropriately per the table below?
!image.png! Mike Fiorenza

AF 03:40 PM MitySOM-5CSX Altera Cyclone V FPGA Development: Issue booting encrypted bitstream on MitySOM-5CSx evaluation board

Hello,
I am trying to test bitstream encryption on a MitySOM-5CSx evaluation board and I am running into an issue during boot.
Here is what I have done so far:
In Quartus, I enabled bitstream encryption and generated an encrypted RBF ... Anonymous fpga

MW 12:30 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Uart issue in Am62P

Hi Rajkumar,
Is the only difference between the AM62P working and not the use of the application code vs. the loopback code?
Are you testing with the same data / BAUD rate in loopback vs. application? Same hardware configuration?
... Michael Williamson

RD 04:37 AM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: Uart issue in Am62P

Hi,
We are working with the Critical Link AM62P and AM62a SoM and have installed Debian 13 on am62P the system. We are currently using UART5 for communication, and we are facing an issue specific to the AM62P module.
Initially, we ... Rajkumar Dumala

11/28/2025

AF 03:57 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Using the design security for MitySOM-5CSX

Hello,
I would like to encrypt the FPGA bitstream on the MitySOM-5CSX. I have been referring to Intel’s application note AN557 (Using the Design Security Features in Intel FPGAs) to understand how to enable bitstream (.rbf file) encrypt... Anonymous fpga