Activity
From 10/06/2025 to 11/04/2025
10/27/2025
- 12:37 AM FPGA Development: RE: Building the MitySOM-5CSX
- Hi Seth,
For the 1st bullet point above I followed your instructions using the *command line* and it worked. Great!...
10/24/2025
- 07:51 PM FPGA Development: RE: Building the MitySOM-5CSX
- Hi John,
Thank you for the additional details. *dd* typically will take a moment to return the prompt, it does on ... - 07:20 PM FPGA Development: RE: Building the MitySOM-5CSX
- Hi Seth,
All I did was extract the image and dd it right to the sd card. I will read in more detail your comments w... - 03:09 PM FPGA Development: RE: Building the MitySOM-5CSX
- Hi John,
Thank you for providing the 3 boot outputs. I've gone ahead and taken a look and I'll make some comments ... - 03:19 AM FPGA Development: RE: Building the MitySOM-5CSX
- Ok, so I downloaded the sd card from the website as instructed, and loaded it onto a fresh card.
I now have 3 _dif...
10/22/2025
- 01:46 PM FPGA Development: RE: Building the MitySOM-5CSX
- John,
Taking a look at your output it appears like you successfully recompiled the SPL and UBOOT. The differences ... - 02:19 AM FPGA Development: RE: Building the MitySOM-5CSX
- Hi, so I was able to make uboot and an sd card image. I took the image and loaded it to a blank sd card and powered ...
10/21/2025
- 06:55 AM FPGA Development: RE: MitySOM-5CSX (5CSX-H6-42A-RI) stops at “Deasserting all peripheral resets” — request for guidance
- Hi Mike,
Thanks for your quick reply.
Here’s what I’ve tried and what I’m seeing:
Reseated the SOM in the DIMM ... - 12:32 AM FPGA Development: RE: Building the MitySOM-5CSX
- Mike,
Thanks. Understood.
Regards,
John
10/20/2025
- 04:26 PM FPGA Development: RE: MitySOM-5CSX (5CSX-H6-42A-RI) stops at “Deasserting all peripheral resets” — request for guidance
- Hi Atef,
It sounds like based on your findings the SOM module is the issue. It looks like you may have tried to re... - 03:41 PM FPGA Development: RE: MitySOM-5CSX (5CSX-H6-42A-RI) stops at “Deasserting all peripheral resets” — request for guidance
- [https://res.public.onecdn.static.microsoft/assets/mail/file-icon/v2/photo_16x16.png]1000008159.jpg<https://sascaila...
- 03:03 PM FPGA Development: RE: MitySOM-5CSX (5CSX-H6-42A-RI) stops at “Deasserting all peripheral resets” — request for guidance
- Hi Atef,
Thank you for the thorough debug details.
# Have you successfully used this development kit before? Or... - Hello Critical Link Support,
I’m evaluating a MitySOM-5CSX module (part number 5CSX-H6-42A-RI) and I’m trying to r... - 02:08 PM FPGA Development: RE: Building the MitySOM-5CSX
- John,
For some background, we have a single Quartus reference design project we have setup for the Cyclone V platf...
10/19/2025
- 01:13 AM FPGA Development: RE: Building the MitySOM-5CSX
- Hi. Taking a few steps back, I was comparing the instructions from
https://support.criticallink.com/redmine/projec...
10/16/2025
- 03:36 PM FPGA Development: RE: Building the MitySOM-5CSX
- Hi John,
I appreciate all the info, no need to be sorry whatsoever! I'll go ahead and try and answer your question... - 01:20 AM FPGA Development: RE: Building the MitySOM-5CSX
- I am using:
Quartus prime 23.1
Ubuntu 24.04.2 LTS ( I noted that this was tested on Ubuntu 22.04...)
1. I w...
10/12/2025
- 10:50 PM FPGA Development: RE: Building the MitySOM-5CSX
- Ok, Thanks, I'll look into it.
Just so you know, I am quite the novice with this, so, I ask that you please be patie...
10/09/2025
- 11:34 AM FPGA Development: RE: Building the MitySOM-5CSX
- Hi John,
On the main wiki landing page, https://support.criticallink.com/redmine/projects/mityarm-5cs/wiki, there ... - 11:30 AM FPGA Development: RE: Building the MitySOM-5CSX
- Hi Seth,
As mentioned, I have been able to build uboot. I am now studying the steps to build the file system with Y...
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