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From 03/12/2014 to 04/10/2014

04/10/2014

RK 12:19 PM Software Development: RE: DSPLink library sources
Thank you very much. That will do
Best regards
Rafał Krawczyk
MW 12:01 PM Software Development: RE: DSPLink library sources
All the dsplink source code should be in the 3rdparty folder of the BSP/MDK.
-Mike
Michael Williamson
RK 11:25 AM Software Development: DSPLink library sources
Hello,
I have a question. Is there any way I could access the source code of DSPLink libraries on DSP side ? Are there the files either on the TI sides in Critical Link's/ MDK ? What I am particularly interested in is the HWI interrupts...
Rafał Krawczyk

04/09/2014

RK 06:31 PM Software Development: RE: DSP- EDMA Transmission problem
Hello again,
Thank you very much for help. For the time being it looks like I will be able to make do with the tcDspUpp.cpp class.
Best regards,
Rafał Krawczyk
NW 06:12 PM Software Development: Not able to update opkg on MityDSP-L138
I am not able to update opkg on MityDSP due to 404 error on angstrom-distribution.org. Where can I get the update? Nick Waite
SD 05:00 PM Software Development: MityDSP-L138 CCS 5.5 XDS510
Hi, I am working with the MityDSP-L138-FI-236-RL target and could use some help to get our XDS510 debugger configured.
The XDS510 is enumerated OK on Windows. I used it before on a different project under CCS3.3
on the same laptop. ...
Steve DeLaney
MW 06:30 AM Software Development: RE: spi1 usage in a custom board
Hello,
Yes, for the 3.2 kernel provided, you need to create (or modify) a baseboard file as you have suggested. If you have a custom board, we recommend you copy the baseboard-industrialio.c file to a new file and modify it to repres...
Michael Williamson
EK 04:09 AM Software Development: RE: spi1 usage in a custom board
Maybe I was not clear...
I do not want to modify uboot. It works good for me as it is.
I would like to configure our SPI using the linux kernel. As written in the previous post my custom board based on MityDSP138F has two ICs attac...
Ehsan Kooh

04/08/2014

JC 01:01 PM Software Development: RE: spi1 usage in a custom board
If they only need to be configured on bootup it might be easier to do it from u-boot. You could try enabling the spi command: CONFIG_CMD_SPI. You could then test your spi commands and could put them as part of the bootcmd variable so t... Jonathan Cormier
EK 09:37 AM Software Development: spi1 usage in a custom board
Hi everybody.
I am a newby in Linux development. I have my custom board based on MityDSP138F with two ICs attached over SPI bus.
SPI signals (MISO, MOSI, and CLK) are attached to SPI1 bus. Chip Selects signal are attached to pins 53 ...
Ehsan Kooh

04/07/2014

JP 12:00 PM Software Development: RE: Net: No ETH PHY detected!!!
I used the serial flashing program to erase the memory before flashing u-boot again and this time phy eth is detected and networking works normally.
I'm sorry for the trouble.
Jordi Perez Serra
JP 10:53 AM Software Development: Net: No ETH PHY detected!!!
Hello,
I have a mitydspl138 board. I accidentally overwrote some of the u-boot memory. I used the serial programmer to re-flash u-boot
https://support.criticallink.com/redmine/projects/arm9-platforms/wiki/Reprogramming_a_Dead_Board
...
Jordi Perez Serra
MW 07:43 AM FPGA Development: RE: UPP Sample Code needed
For the FPGA interface, you could take a look at the "Vision Framework Design FIles":https://support.criticallink.com/redmine/projects/indio/wiki/Vision_Framework_Kit. This uses the UPP to push video data from the FPGA to the OMAP-L138. ... Michael Williamson
MW 07:39 AM Software Development: RE: DSP- EDMA Transmission problem
Hello Mr. Krawczyk,
You can interface with the UPP directly as you have described and by looking through the TRM, or you can try to use the tcDspUpp.cpp class, which was intended to help a little with that but it certainly not require...
Michael Williamson

04/03/2014

RK 09:35 AM Software Development: RE: DSP- EDMA Transmission problem
Hello Mike,
The UPP seems to be an optimal solution. However, It looks like configuring the UPP is a bit complex. I can see there is a tcDspUpp.cpp file in a core library and some usage of its methods in tcDspFpgaCameraLink.cpp.
My qu...
Rafał Krawczyk
AS 01:26 AM FPGA Development: UPP Sample Code needed
Hi everyone,
I need a sample FPGA code for UPP(Supported by Critical Link) with it's UCF file(including timing constraints).
Thanks in advance.
Ahmed Shaaban

04/01/2014

MW 05:23 PM Software Development: RE: DSP- EDMA Transmission problem
Actually,
I was going to suggest transferring to IRAM, or if you need to transfer to DDR, doing a chained transfer:
EMIFA -> IRAM, then IRAM->DDR
Sounds like you've seen improvement in moving into the IRAM. Unfortunately, our Q...
Michael Williamson
RK 04:53 PM Software Development: RE: DSP- EDMA Transmission problem
To be more precise,
Is there any way to change the EDMA3 configuration to reduce transfer time ? I want to transfer the data from FPGA's 16-bit EMIFA bus to IRAM, where I think the memory bus is 32-bit. For now I am using the unchanged ...
Rafał Krawczyk

03/31/2014

RK 05:20 AM Software Development: RE: DSP- EDMA Transmission problem
Hello again,
I am writing because I have the following problem:
I succesfully transfer the data, but the transfer time seems to take too much time. I am transferring 4096 16-bit words using the modified FPGA EMIFA interface that takes ...
Rafał Krawczyk

03/26/2014

RK 03:16 PM Software Development: RE: DSP- EDMA Transmission problem
Solved !
You can use the IRAM section. It is disabled as cache in the current configuration .tcf file.
Best regards
Rafał Krawczyk

03/24/2014

MW 09:57 AM Software Development: RE: GEL-file for MityDSP-L138F
Yes. By default, the core should be 1.2V on power up.
-Mike
Michael Williamson
OM 09:38 AM Software Development: GEL-file for MityDSP-L138F
Hi,
that gel-file need to use for mitydsp-L138F with 1.2 V Core?
Thanks
Oleh Mela

03/23/2014

FT 08:05 PM FPGA Development: RE: Manage LX16 and LX45 at runtime
Thanks a lot Mike!
As usual, your support is impressive!
Ticket close.
-François
François Tremblay
MW 05:18 PM FPGA Development: RE: Manage LX16 and LX45 at runtime
The model number for the part should be readable in the factory configuration information in the I2C prom. The model number includes a letter code for the FPGA type for the SOM. There is a factoryconfig utility program that can be run ... Michael Williamson
FT 04:55 PM FPGA Development: Manage LX16 and LX45 at runtime
We have a product based on MityDSP-L138F using either LX16 and LX45 fpga cores.
Q1) Can we detect which FPGA core is running at runtime from Linux?
Q2) Is program_fpga.sh script and fpga_ctrl.ko module are able to handle both at ru...
François Tremblay

03/19/2014

AS 07:08 PM Software Development: Error while connecting to ARM9
Hello everyone,
I have a MityARM 1808F and I am facing a strange issue which is as follows:
* when I am trying to connect to ARM +without+ stopping the uboot (from booting linux), I receive this error
Ahmed Shaaban
 

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