Activity
From 05/10/2013 to 06/08/2013
06/07/2013
- When (in the DSP Hello World) the arm calls ldDspApp0>StopApp(), I receive an error message (at the bottom of this post)
I have seen several other unresolved issues of the same sort of on this forum. Has there been anything done to addr...
06/06/2013
- NA 04:41 PM Software Development: RE: Warning messages when running DSP Hello World
- I'm getting the same thing
- CO 04:29 PM Software Development: RE: DSP vs NEON for Floating point
- Digikey is open but managers' pockets are closed most of the time!
My circuit design is in flux still but I'm at the stage where I'll have to interface to the module itself rather than using the Industrial I/O board. Getting others to... - MW 11:39 AM Software Development: RE: DSP vs NEON for Floating point
- Digikey is open 24 hours a day!
Do you have a lot of interfaces to rework if you retarget your module?
-Mike
- CO 11:28 AM Software Development: RE: DSP vs NEON for Floating point
- Thank you for that Mike. I'm trying to figure out is it worth the pain of learning the DSP toolsets and dealing with CCS if I could chuck it all in and move to a different platform and just use gcc. But apparently there are math librarie...
- MW 09:47 AM Software Development: RE: DSP vs NEON for Floating point
- The DSP floating point performance is *very good* compared to the ARM9. It's actually faster (when coded right) than the Cortex A9 because it has multiple ALUs for floating point.
I will try to dig up a trade study we did on this a w... - Dear Critical Link,
Now that you have newer modules in Cortex A8 and Dual A9 versions, I have a question as regards the efficacy of the L138 for certain processing work. The project I am on will take data like absorption spectra and p... - I have measured a significant 500kHz noise burst on the CAN bus pins of the Industrial IO board. the reason for checking this is I am noticing frame drops from the candump frames by comparing the candump output to a logic analyzer. Are y...
06/05/2013
- JY 01:08 PM Software Development: RE: Can Interface won't probe
- Okay, I had wiring problem. candump now dumps the received frames to the console. So we are up and running. thanks for your help.
Jeremy - MW 12:33 PM Software Development: RE: Can Interface won't probe
- Can you dump out the exact commands you used?
Thanks. (I am not a CAN expert, but I can try to track down the engineer that did the original testing).
-Mike
- JY 12:27 PM Software Development: RE: Can Interface won't probe
- Well, Although the kernel now sees the CAN controller the ifconfig -a reads all zeros for everything even after I apply the IP command and bring up the interface with ifconfig. Let me know if there is anything else I need to do to bring ...
- JY 11:26 AM Software Development: RE: Can Interface won't probe
- I applied the patch to the 3.2 kernel and it is now up and running. I will now check the the functionality with the canutils. Thanks for the quick response.
Jeremy - JY 11:00 AM Software Development: RE: Can Interface won't probe
- I am dead in the water at the moment. I will try the patch set on the 3.2 kernel and let you know how it goes.
- MW 10:23 AM Software Development: RE: Can Interface won't probe
- Hello,
I've pushed a "patch set":http://support.criticallink.com/gitweb/?p=linux-davinci.git;a=commit;h=c008e4e8bbd2e3709da2d4bbfd7f5d772640bebf (really only need the last one) to the mitydsp-linux-v3.2 branch that will get the CAN co... - MW 07:31 AM Software Development: RE: Can Interface won't probe
- Hello Mr. Young,
I have reproduced the issue here. There are some patches that never made it to our external git tree that need to be added.
You were right, one of the patches involved the SPI1 pin-mux enables.
I will get the p...
06/04/2013
- JY 01:51 PM Software Development: RE: Can Interface won't probe
- The only other thing is I have your rs485 converter card plugged into the expansion port for UART2
- JY 01:44 PM Software Development: RE: Can Interface won't probe
- The revision # is 80-000268RI-2B
I downloaded the latest release today and compiled the kernel with out the audio card and mmc stuff. no modification to the baseboard implementation file.
I will redo the kernel with zero changes an... - MW 01:35 PM Software Development: RE: Can Interface won't probe
- Can you please send me the revision of the board you are working with (there should be an 80- number somewhere on the board)?
I will try to reproduce the issue. Could be a pinmux thing, but that would mean we have a problem with our ... - JY 01:01 PM Software Development: RE: Can Interface won't probe
- It is just the eth0 and lo entries. there is no can0 entry. the probe fails on boot up.
- MW 12:07 PM Software Development: RE: Can Interface won't probe
- Can you dump the text of "ifconfig -a"?
-Mike - JY 12:06 PM Software Development: RE: Can Interface won't probe
- In case it is important I am using the Am1810 with the industrial IO board. I have tried both Linux branches and they both give the same error. It seems the pinmux isn't right but I am uncertain as to what it should be.
06/03/2013
- I get the following dmesg about the MCP251x not working,
MCP251x didn't enter in conf mode after reset
Is there something I need to do with the pin muxing to get this working?
05/31/2013
- I'm using a USB 2.0 ethernet adapter with mityARM-1808.
It works good in 2.6.34.rc1 kernel but bad in 3.2.0.
I do almost same configuration to build the kernel, but the results turn different.
When boot 2.6.34, the kernel could dete...
05/29/2013
- GG 09:20 AM Software Development: RE: Debugging DSP-App when DSPLink is running
- Hi Christian,
See the last section of http://support.criticallink.com/redmine/projects/arm9-platforms/wiki/DSP_Quick_Start for details on how we debug a DSP application that has been loaded by the ARM via DSPLink. I do not have much ... - Hi all,
what is the usual procedure for debugging the DSP-App when using the DSPLink?
Based on the DSPLink example, out from the wiki, I developed an DSP-App where the functions are controlled by the ARM-App.
I know that I can de... - BK 03:40 AM Software Development: RE: U-Boot ELF loader
- Oops, my silly. That now works, it takes the TI CCS image and moves sections to the correct address and runs :)
Thanks again for your help.
Bruce
05/28/2013
- Hello,
I'm using the UPP on the OMAP-L138F to receive video data that's been buffered by the Xilinx FPGA. The FPGA logic is based on the source provided in the Vision Developer Kit and is mostly intact except it has been modified to han... - MW 11:06 AM Software Development: RE: U-Boot ELF loader
- Hi Bruce,
Looking at your elf information, it looks like you are loading the ELF image to 0xc0700000, which is right in the middle of your text areas (the seem to span from 0xC0000000 through 0xC0CBFFFF or thereabouts).
Am I read... - BK 08:51 AM Software Development: RE: U-Boot ELF loader
- The above thread has gone a little cold, does anyone know if uboot ELF loader should work with TI Code Composer generated images?
Thanks,
Bruce
05/24/2013
- I am running DSP/BIOS on the DSP and linux on the ARM (MDK_2012-08-10).
The DSP receives data from the McBSP1 via EDMA using the SIO_issue()/SIO_reclaim mechanism from the TI example. After processing the data, it is loaded into a sec...
05/22/2013
- WC 08:18 AM FPGA Development: RE: FPGA load verification
- Mike,
While troubleshooting the state of the lock status line I did discover there were instances of the clock not being locked, which I believe was the source of the problem we were seeing. I moved the clock monitoring code from your... - MW 08:05 AM Software Development: RE: SATA link down
- Hi,
Can you confirm that your drive is limited to SATA-II link speeds.
See the "AM1808 Errata":http://www.ti.com/lit/er/sprz313e/sprz313e.pdf Advisory 2.1.11 for details.
This usually resolves the issue. Most drives have a ju... - I am attaching SATA SSD drives to MityARM1808.I am using 2.6.x kernel and NFS.My SSD is formated EXT2 with 1 Partition.
At first time I boot the kernel,the SATA drive is automounted to /media/sda1,everthing works well.
But after I do a...
05/21/2013
- JC 11:14 AM Software Development: RE: Open Embedded Core Process Release Date
- As of right now and the foreseeable future the bitbake process is not working.
Your best options for creating a custom filesystem image are to either:
1. Create an opkg file that modifies our base filesystem to match what you wan... - KR 10:48 AM Software Development: RE: Open Embedded Core Process Release Date
- Hi,
Sorry for the lack of detail,
I want to setup an Open Embedded/Angstrom build system for a product I'm working on to allow us to tailor the root filesystem image to our requirements.
Look at the ARM Wiki there are instruct... - JC 10:47 AM Software Development: RE: Open Embedded Core Process Release Date
- Are you refering to this other post?
http://support.criticallink.com/redmine/boards/10/topics/2573?r=2707
It appears we overlooked this post. Sorry about that. The easiest way I know of to setup the development environment is to fo... - JC 10:39 AM Software Development: RE: Open Embedded Core Process Release Date
- Kevin,
Have you seen this page [[Starter_Guide]]?
Also we just released a new MDK that contains an updated kernel and industrial io board filesystem.
http://support.criticallink.com/redmine/attachments/download/3047/release_2013-0... - Hi,
I'm trying to build a MityDSP Image from the currently released information/files without success,
I realize the details are preliminary on the Web Page "Installing Open Embedded Core" - is there any information on the next re... - BK 05:30 AM Software Development: RE: U-Boot ELF loader
- Mike, thanks for your reply.
I tried lminfo and it doesn't recognise the image. I attach a log of the u-boot commands used and a small dump of the file. Also a log from a PC application (readelf) which seems to decipher the header O...
05/20/2013
- YW 09:39 AM Software Development: RE: ethernet over USB don't work
- My problem is solved now.
Thanks a lot. - MW 08:45 AM Software Development: RE: U-Boot ELF loader
- You may need to provide an "entry point" argument to the linker to point to the location in memory that the code should jump to. Have you dumped out your elf headers? I think by default the entry point is 0 for linux apps as it will ge...
- BK 08:17 AM Software Development: RE: U-Boot ELF loader
- Jonathan,
Thanks for pointing me in the right direction. I have downloaded the latest MDK and installed u-boot. The bootelf command was there but appeared to not work. It attempted to jump to address 0x00000000 which was never going ...
05/19/2013
- YW 10:00 PM Software Development: RE: ethernet over USB don't work
- How to do this change ?
I could find the call "mityomapl138_usb_init(MUSB_OTG)" in which file ?
An odd thing is that when I changed nothing but some drivers option in menuconfig, rebuilt the kernel, the DRVVBUS pin was not driven. ...
05/17/2013
- WC 03:04 PM FPGA Development: RE: FPGA load verification
- Thanks Mike.
I'm troubleshooting using your suggestions. I'll let you know what I find.
- GG 10:23 AM Software Development: RE: Start Guide : Cannot build helloworld application with eclipse
- Hello,
Have you run the environment setup script: - KR 06:02 AM Software Development: RE: Open Embedded build error
- Hi,
Was there a resolution to this problem - I'm having the same problem.
Is it because mitydsp-preferred-revs.inc is pointing to
CLSVN_BASEURI_mityomapl138 ?= "svn://wanda/svn/mityomap/mityomapl138"
Is there external access...
05/16/2013
- HF 05:53 PM Software Development: RE: Video output blinks frequently
- FIXED! I changed VPIF DMA0/1 priority from 4 to 1 and the blinks went away. Thanks you, Mike.
-Helmut - JC 08:45 AM Software Development: RE: U-Boot ELF loader
- Bruce,
Elf support was added on the following commit.
http://support.criticallink.com/gitweb/?p=u-boot-mitydspl138.git;a=commit;h=664282611755f43d396887e3ba2c8f06e275ea86
The latest MDK should have this change and includes the lat... - Am I correct in thinking that the latest u-Boot has an ELF loader? I take it that this will load an ELF image into RAM that can then be executed.
Currently our boards have an old version of uBoot. Is the latest available for downloa...
05/15/2013
- HF 11:40 AM Software Development: RE: Video output blinks frequently
- Mike,
I'm using VPIF. It *might* also be the case that my interfering tasks are interfering because they're transferring 153600 byte buffers between the DSP and ARM, via proc_READ() and proc_WRITE(). These transfers are intended to ... - HF 11:10 AM Software Development: RE: Video output blinks frequently
- VPIF!
- HF 11:08 AM Software Development: RE: Video output blinks frequently
- Mike:
Thanks for the advice. FYI, this is same project as Wade Calcutt is working on, regarding FPGA loading properly.
Bumping up bus master DMA priority sounds like that for which I'm looking. I looked at the TRM, and please con... - MW 10:26 AM Software Development: RE: Video output blinks frequently
- I suspect that you need to increase the bus master DMA priority of the VPIF or LCDC peripherals (it's not clear to me which output you are using, VPIF or LCDC, sounds like maybe VPIF).
You can read up about the priorities in the "OMAP... - JC 10:24 AM Software Development: RE: Video output blinks frequently
- Helmut,
First thing is which version of the kernel are you running?
__uname -a__
Also the command __nice__ can be used to start applications in a lower priority.
http://www.manpagez.com/man/1/nice/
There is also a system call ... - My custom system is based on the MityOMAP-L138F.
At random times, but fairly frequently, my video output corrupts for a frame. The nature of the corruption is that a single line (perhaps the top line) is shifted part way across the s...
05/14/2013
- MW 10:43 AM FPGA Development: RE: FPGA load verification
- You might bring the DCM status lines (particularly the lock status) to a scope just to see if that is the core issue.
-Mike
05/13/2013
- WC 03:12 PM FPGA Development: RE: FPGA load verification
- Mike,
To my knowledge we're not changing the CPU frequency. That being said, one of the output messages during Linux boot is:
MityOMAPL138: setting max frequency to 456 MHz
But that doesn't necessarily mean the frequency was bum... - MW 01:09 PM FPGA Development: RE: FPGA load verification
- Wade,
The EMIFA output clock can change if the OMAP-L138 CPU frequencies are modified (the EMIFA output clock is one of the SYSCLOCK divider outputs on PLL0).
Is it possible you are changing the CPU frequency or messing with the PL... - WC 12:28 PM FPGA Development: RE: FPGA load verification
- Hi Mike,
Thanks for your response and troubleshooting suggestions.
To answer your questions:
*Are you using a DCM or PLL? What is your clock source?*
I'm using a DCM as the clock source. Its source is the 100MHz EMIFA clock and... - MW 12:12 PM FPGA Development: RE: FPGA load verification
- Hi Wade,
If you are getting the "done" light on the part, then the FPGA is loading correctly and it's 99.99999999999% likely a logic, or more likely a logic reset condition in the code. I only say this because we have never had a pro... - I'm using a MityDSP-L138F with an FPGA load that is a modified version of the example code provided in the Vision Dev Kit. As part of the modifications I stripped out the base module, EMIFA interface, etc. and used a modified version of ...