Activity
From 02/05/2012 to 03/05/2012
03/04/2012
- SG 06:11 PM Software Development: RE: about boot
- Mike,
Thank you very much. I understand. - MW 04:51 PM Software Development: RE: about boot
- The EXT_BOOT# signal drives a small mux circuit on the SOM that changes the boot strap pull-up/pull-down options on the OMAP-L138 such that it will use UART0 instead of SPI1_CS0 as the primary boot device. If you need details about this...
- MW 04:56 PM PCB Development: RE: FPGA no-connects for 45 size FPGA on MityDSP-L138F
- The bare board PCB for the two variants of the SOM are identical, the only difference is the BOM used for assembly. Pins 170 and 172 are still routed to the balls on the FPGA (E7/E8). However, I'm fairly certain that these pins are not...
03/01/2012
- I wonder how the boot mode switch from SPI1 to UART1 using EXT_BOOT# signal? Thank very much.
02/28/2012
- (Posted on behalf of a customer)
We have done a design using the MityDSP-L138F SOM. I tried avoiding using the pins on the FPGA that are not connected in the larger variant, but I was not succesfull, meaning I accidently used two of t...
02/22/2012
- TE 05:01 PM Software Development: RE: Hello World Starter Guide Permission Issue
- You rock! It was the file that was the problem. I found the executable and it worked. Thanks!
- GG 04:50 PM Software Development: RE: Hello World Starter Guide Permission Issue
- Hi Tim,
First, the reason you're getting the "-sh: ./hello.o: Permission denied" error is because the file you are trying to execute does not have execute permissions set. (You can see a file's permissions using the "ls -l" command an... - I am a newbie to the arm environment and quite green on linux as well. I have been going through the hello world example located here (http://support.criticallink.com/redmine/projects/arm9-platforms/wiki/Starter_Guide). I have worked m...
02/16/2012
- (posted on behalf of a customer)
For the MityDSP-l138F, I noticed the drill hole for the standoff in the Altium file (for the Industrial IO board) is acutally about 1780mils from the center of the DIMM Connector. As oppose to 2in - ....
02/06/2012
- (posted on behalf of a customer for the MityARM-1808F module)
Any advice on how to connect your EMIF interface to an AXI bus (a Xilinx FPGA core standard) in the FPGA would be appreciated.