Project

General

Profile

Activity

From 12/19/2024 to 01/17/2025

01/17/2025

LD 02:22 PM FPGA Development: Issue compiling MitySOM-C10L FPGA Reference Design
Compilation of reference design fails. The issue seems to be that it does not find UART IP. Maybe it is because it is lacking definitions for 10CL080YU484I7G (see first error). Lucas Diodati
 

Also available in: Atom

Go to top