Mity CPU Platforms » MitySOM-C10GX

08/14/2024

GG 01:48 AM Hardware Design: RE: JTAG Interface

Hello,
Regarding the first question, unfortunately, the 2.5 V levels being used for the Max10 FPGA will not be compatible with MitySOM-C10G. The Intel® Cyclone® 10 GX Device Family Pin Connection Guidelines states that for JTAG pins ... Gregory Gluszek

08/09/2024

TC 09:24 PM Hardware Design: JTAG Interface

(Posted on behalf of a customer)
On my existing system, the Max10 FPGA has the USB Blaster interface that uses 2.5V JTAG levels that I also route to a CPLD on my board. From the MitySOM-C10G documentation, the 10G uses 1.8V JTAG L... Thomas Catalino