Mity CPU Platforms » MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P

02/19/2026

JP 08:15 PM Software Development: RE: Problems writing to MCU_GPIO0_19 and MCU_GPIO0_20

Hello Paul,
We have replicated this issue on our end. I am using a 62x with our latest SDK (11.01) and found that MCU_GPIO0_17 through MCU_GPIO0_20 were not changing after a gpio set. We also noticed MCU_GPIO0_0 through MCU_GPIO0_4 we... Jake Pregitzer

JC 07:36 PM Software Development: RE: Problems writing to MCU_GPIO0_19 and MCU_GPIO0_20

Also are you testing this on our devkit or on a custom design? If a custom design, would you be willing to email it to us for review? Jonathan Cormier

MW 07:19 PM Software Development: RE: Problems writing to MCU_GPIO0_19 and MCU_GPIO0_20

Hi Paul,
To confirm, you are using a standard AM62x SOM, correct (not an AM62Ax or AM62Px)?
Thanks,
Mike
Michael Williamson

PS 04:19 PM Software Development: RE: Problems writing to MCU_GPIO0_19 and MCU_GPIO0_20

Thanks Mike
I think I have set up the GPIO lines correctly. I followed the steps described in the following wiki
https://support.criticallink.com/redmine/projects/mitysom_am62x/wiki/Example_-_User_level_GPIO_Access
I came up with gp... Paul Strutt

MW 12:59 PM Software Development: RE: Problems writing to MCU_GPIO0_19 and MCU_GPIO0_20

Hi Paul,
By default, the MCU_GPIO peripheral is controlled in the linux kernel for the devkit. (see the arch/arm64/boot/dts/k3-am62x-mitysom-devkit.dts file which enables it).
I am wondering if perhaps there is a conflict between ... Michael Williamson

PS 11:41 AM Software Development: Problems writing to MCU_GPIO0_19 and MCU_GPIO0_20

I have created an MCU application that uses the MCSPI to communicate with multiple SPI devices.
We need to talk to up to eight SPI devices so are using the MCSPI with a single chip select (MCU_SPI0_CS0), and then are using 3 GPIO lines ... Paul Strutt