Activity
From 05/27/2025 to 06/25/2025
06/24/2025
- MW 11:53 AM Software Development: RE: Issue with Native EtherCAT Driver Installation on AM62A with IGH Stack
- Hi Debashis,
I think you are correct.
I only have seen TI mentioning supporting CODESYS for ethernet master operations an the AM62x family. For slave you'd likely have to run the R5F and I don't think you can share the switch with... - RD 10:55 AM Software Development: RE: Issue with Native EtherCAT Driver Installation on AM62A with IGH Stack
- Hi Experts,
Both interfaces are linked to the same bus address (8000000.ethernet), which I understand represents a single CPSW Ethernet controller.
To illustrate the architecture:
+---------------------------+
| Linux Network Int... - Dear Support Team,
I am currently working on integrating the EtherCAT native driver on a MitySOM-AM62Ax platform using the EtherCAT IGH master stack.
During the configuration process, I encountered the following issue:
I compile...
05/30/2025
- RD 06:40 AM Software Development: RE: Enquiry about mcu_safety_error pin
- Hi Mike,
Thank you for your response.
We are working with the SDL (Safety Diagnostic Library), and as part of this, we have enabled DCC, ECC, and MCRC as per our requirements. Now, we are moving on to BIST (PBIST/LBIST).
As we u...
05/29/2025
- MW 09:23 AM Software Development: RE: Enquiry about mcu_safety_error pin
- Hello,
The MCU_ERRORn signal is not connected to the PMIC. It is pulled low on the board via a 4.7K resistor.
You do not need to include the LTC2945HUD-1#PBF in your design, but should remove it's entry in the device tree you boo... - Hello there,
Question 1. For the MitySOM AM62A, is the pin MCU_SAFETY_ERRORn connected to the PMIC ?
Question 2. Can you explain the logic of SOM Power Monitor circuit (U1 / LTC2945HUD-1#PBF) in your carrier board ? We have implem...