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From 06/05/2023 to 07/04/2023

06/05/2023

JC 06:46 PM PCB Development: RE: VSEL_SD functionality
No problem. I condensed all this info into a wiki page for future reference as well. And have initiated changes for our datasheet and errata to correct the signal name.
https://support.criticallink.com/redmine/projects/mitysom_am62x...
Jonathan Cormier
PS 06:25 PM PCB Development: RE: VSEL_SD functionality
Thank you very much to both of you for the quick and extensive answer. The key information that the voltage of VDDSHV5 is controlled via the VSEL_SD pin might be worth putting into the datasheet. Special thanks for the pointers on the er... Pal Szabo
JC 05:51 PM PCB Development: RE: VSEL_SD functionality
The software side of the SD voltage selection is configured here:
https://support.criticallink.com/gitweb/?p=linux-ti.git;a=blob;f=arch/arm64/boot/dts/ti/k3-am62x-mitysom-devkit.dts;h=725aba2f30bb44c86b9d86d432cae15f3b08f067;hb=refs/h...
Jonathan Cormier
JC 03:02 PM PCB Development: RE: VSEL_SD functionality
Pal Szabo wrote:
> What is the functionality of the VSEL_SD pin (position 176 on the SODIMM connector)? Is it the same signal as VD_SEL mentioned in Note 8 in the MitySOM-AM62 datasheet on page 18? The datasheet does not contain more in...
Jonathan Cormier
PS 09:05 AM PCB Development: RE: JTAG TRSTn pulldown and other JTAG pullups
Thank you very much Mike, this clarifies the implemented pulls! Pal Szabo
 

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