Activity
From 08/26/2026 to 09/24/2026
08/28/2026
- MK 07:07 PM FPGA Development: RE: Programming File Generation
- Hello Mike,
Yes, actually this script A5ED065BB_mesh.pfg - worked.
I've created programming files and was able to boot.
And it is strange that the error message disappeared.
Thanks for your help!!!
Thanks,
Max
08/26/2026
- VD 02:53 PM FPGA Development: RE: To enable 4 PCIe RP and EP on this board, Need to know the PERSTn signal connections (its very unclear on who drives these signals)
- Hi Dan,
I am on mobile right now so cant attach files. BMC is Board Management Controller which handles power sequence of board and also telemetry. In general it drives perstn to root port as well as endpoint.
Altera Confidential
__... - DV 02:43 PM FPGA Development: RE: To enable 4 PCIe RP and EP on this board, Need to know the PERSTn signal connections (its very unclear on who drives these signals)
- Hi Vasu,
The picture still didn't come through. Can you attach it via the "Choose Files" button at the bottom of the post? Also what does BMC stand for when you say "we generally expect PERSTn for RP to come from FPGA IO driven by BMC...