Mity CPU Platforms

07/21/2025

04:44 PM MitySOM-C10GX Firmware: RE: Clock on MitySOM-C10G

On the MitySOM C10G, there is an onboard 100 MHz oscillator connected to FPGA Ball Y15, which has optional function C... Noah Zins

12:23 PM MitySOM-C10GX Firmware: Clock on MitySOM-C10G

I am new to FPGA in general so forgive me if this question is simple.
* Which pin/pins are configured in the hardw... Thomas Catalino

07/08/2025

01:53 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Clarification regarding LED 4 on MitySOM-5CSX DevKit

Hello,
When you refer to the "binary," are you referring to the RBF file used to program the FPGA? If so, are you ... Daniel Vincelette

01:16 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Clarification regarding LED 4 on MitySOM-5CSX DevKit

Thank you for your response. I’ve updated the clock pin configuration as suggested.
However, I’m currently facing ... Atef DORAI

07/03/2025

06:31 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Unable to program FPGA – “MSEL switch is in the wrong position” on MitySOM-5CSX dev kit

Hello,
We were able to recreate your issue with the app you were using (https://github.com/robseb/rstoolsCY5). Aft... Seth Graber

07/02/2025

03:13 PM MitySOM-5CSX Altera Cyclone V FPGA Development: Unable to program FPGA – “MSEL switch is in the wrong position” on MitySOM-5CSX dev kit

I’m bringing up our new MitySOM-5CSX evaluation board and ran into an issue while trying to load the reference bitstr... Atef DORAI

03:07 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Clarification regarding LED 4 on MitySOM-5CSX DevKit

I believe the spreadsheets are correct.
T13 is not connected to a dedicated clock input pin, needed to feed a REFC... Michael Williamson

02:42 PM MitySOM-5CSX Altera Cyclone V FPGA Development: Clarification regarding LED 4 on MitySOM-5CSX DevKit

I am posting this on behalf of a customer.
... Judy Mastracco