Activity
From 04/27/2025 to 05/26/2025
05/26/2025
- MN 02:35 PM MitySOM-5CSX Altera Cyclone V PCB Development: RE: Displayport
- Thank you very much for your quick answer ! Your schematic is very clear, it's exactly what I was looking for; I'll add ESd protection on HPD and adapt voltages for my banks.
Thanks again,
Morgan - MW 10:47 AM MitySOM-AM57X Software Development: RE: Programming FPGA through JTAG and High speed data transfer support
- Hi Shankar,
It is a US holiday today, I will add some documentation for programming via JTAG (at least a wiki page) first thing tomorrow.
In the meantime, you should be able to use any AMD / Xilinx approved POD, but you will need a... - Hello everyone,
We are currently working on a project using the MitySOM-AM57X development board, and we would appreciate some guidance on programming the FPGA via JTAG. Could anyone kindly share the detailed procedure or point us to r...
05/23/2025
- MW 04:23 PM MitySOM-5CSX Altera Cyclone V PCB Development: RE: Displayport
- Hello,
We have driven a displayport output from a MitySOM-5CSX transceiver group.
For proof of concept we had done an adapter board to use the PCIe slot of the MitySOM-A5E development kit to drive a mini-display port adapter (same ... - SM 01:59 PM MitySOM-AM57X FPGA Development: RE: MitySOM-AM57F communicating to FPGA via PCIe
- Thanks mike for the quick response. I will look through these examples
- MF 01:45 PM MitySOM-AM57X FPGA Development: RE: MitySOM-AM57F communicating to FPGA via PCIe
- See link below for the FPGA example projects which include PCIe.
https://support.criticallink.com/redmine/projects/mitysom_am57x/wiki/FPGA_Example_Projects - We are using MitySOM-AM57(F) Development Kit for our development. Are there any examples provided to read and right to the FPGA via PCIe in the default BSP
which you are providing.
05/22/2025
- We are planning to use the high speed transceivers for a displayport output, but we're not sure of voltage compatibility and needed protection. Did you ever used transceiver for this usecase ?
I am posting this on behalf of a customer.
05/20/2025
- RD 05:29 AM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Enable DDR ECC in Am62A processor
- Hi Jonathan,
Thank you for your support. It's clear now, and I see that they have provided the DDR ECC driver code in R5. I will look into it and try to inject and test DDR at runtime.
Thank you,
Rajkumar
05/19/2025
- JC 03:29 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Enable DDR ECC in Am62A processor
- Rajkumar Dumala wrote in message#6956:
> Hi Jonathan,
> ...
05/18/2025
- BS 06:47 PM MitySOM-AM57X PCB Development: RE: I/O voltage levels
- Hi Michael,
I would like to thank you for the continued support and prompt assistance you have extended to us.
As we proceed with the next steps, I would appreciate it if you could kindly share the detailed procedure for pr...
05/16/2025
- RD 06:33 AM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Enable DDR ECC in Am62A processor
- Hi Jonathan,
Thank you for the response.
I applied the three patches you provided to my current workspace, rebuilt U-Boot and the device tree, and it is working fine—the system is booting successfully.
However, I have a few doub...
05/14/2025
- JC 08:34 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Enable DDR ECC in Am62A processor
- Attached 2 patches for u-boot and 1 patch for the kernel.
Most of these changes you and Mike have already talked about. I think attachment:0002-mitysom-62ax-hack-Reduce-4GB-size-for-ECC.patch is likely the part your missing.
Also ... - JC 02:20 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Enable DDR ECC in Am62A processor
- Thanks Rajkumar, I agree. I'll look into it today.
- RD 04:22 AM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Enable DDR ECC in Am62A processor
- Hi Jonathan,
Thank you for the clarification.
From what I understand, the DDR setup code dynamically detects the RAM size and initializes the DDR during the U-Boot phase. When ECC is enabled, a portion of memory (around 1/9th) is r...
05/13/2025
- JC 09:25 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Debian SDK Not booting in am62p (Am62x dev kit)
- Rajkumar Dumala wrote in message#6940:
> Hi Mike,
> ...
Note per "PCN20250509000":https://support.criticallink.com/redmine/projects/mitysom_am62x/wiki/Errata_and_Module_Product_Change_Notifications the AM62A you have may be set to 1.25... - MW 09:29 AM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Debian SDK Not booting in am62p (Am62x dev kit)
- Hi Rajkumar,
It's not clear why there would be a difference between the two. It's the same processor / frequency design.
You might try and disable all of the peripherals you don't intend to use in the device tree you are using, as... - RD 07:28 AM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Debian SDK Not booting in am62p (Am62x dev kit)
- Hi Mike,
I was on leave for the past four days, so I wasn't able to communicate.
When we tested on the TI EVM, the behavior was slightly better, and we were able to achieve 800 Hz.
Thank you,
Rajkumar.
- JC 04:48 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Enable DDR ECC in Am62A processor
- Sorry guys. Ecc doesn't work with the current u-boot code.
The issue is my ddr setup code which dynamically sets up the ddr based on ddr size. The code needs to reduce the max size when ecc is enabled.
I have some hard coded test c... - MW 02:21 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Enable DDR ECC in Am62A processor
- Hi Raj,
Does it work on the TI EVM? The reason I ask is that the EVM has 8 GB of memory. I just want to make sure it's memory size and not something with the IPC / DSP comms and enabling ECC that is the problem.
-Mike
- RD 02:01 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Enable DDR ECC in Am62A processor
- Hi Mike,
I don't understand why it's not working, even though all the reserved regions seem to be within the valid memory range.
@@[ 0.000000] Reserved memory: created CMA memory pool at 0x00000000c0000000, size 256 MiB
[ 0.00... - MW 12:11 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Enable DDR ECC in Am62A processor
- Hi Rajkumar,
From this link:
https://support.criticallink.com/redmine/projects/mitysom_am62x/wiki/Enabling_DDRSS_ECC
The maximum memory address is approximately 0xFFFFFFFF * 8 / 9 ~= 0xE38E38E2
It looks like the maximum CMA s... - RD 10:42 AM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Enable DDR ECC in Am62A processor
- Hello,
It was my mistake—I shared the wrong screenshot earlier. You can find the correct one attached with this message.
Thank you,
Rajkumar - RD 10:38 AM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Enable DDR ECC in Am62A processor
- Hello Mike,
I reduced the CMA size to 512 MiB; however, the issue remains the same.I am providing the image for your reference.
Thank you,
Rajkumar.
- MW 09:37 AM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Enable DDR ECC in Am62A processor
- Well. Sorry it only goes up to 0xF0000000. But that still may be too high.
- MW 09:36 AM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Enable DDR ECC in Am62A processor
- Hello,
When you enable ECC in LPDDR4, you reduce the maximum amount of addressable memory available to the device. IT uses some of the 4 GB to hold the ECC data.
The CMA settings I am seeing above include a 576 MB (assuming 0x2000... - RD 07:49 AM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Enable DDR ECC in Am62A processor
- Just to add to the above point:
In the boot log, it shows that ECC is enabled, and I am able to run some test cases as mentioned in the TI documentation using U-Boot (manual boot mode).
Thank you. - Hello there,
We are using the MitySOM-AM62x Devkit with the AM62A System on Module (SoM), which includes 4 GB of LPDDR4 (with inline ECC).
As part of SDL, we enabled ECC in the R5 MSRAM (512 KB) it is working fine . After that, I e...
05/12/2025
- MW 01:37 PM MitySOM-AM57X PCB Development: RE: I/O voltage levels
- Hi Shankar,
Take a look at our PCIE / DMA example on our git server:
https://support.criticallink.com/gitweb/?p=mitysom-am57x-ref.git;a=tree;f=fpga/pcie_dma_example;hb=0e1b86410b434ec44afb98d9959deaee252902c0
The project should ... - BS 12:25 PM MitySOM-AM57X PCB Development: RE: I/O voltage levels
- Hi Michael,
Thank you for your response.
We are initiating FPGA development on the MitySOM-AM57X development board
using Vivado. We are currently seeking the FPGA pin mapping details for the
PCIe interface to the ARM processor. We ...
05/07/2025
- JC 02:55 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Debian SDK Not booting in am62p (Am62x dev kit)
- Note we are not super familiar with ROS but from my quick googling, sending messages around 1kHz does seem like its approaching the limits of ROS2 even on a desktop system. I'm not saying its not possible because I don't know but we shou...
- JC 02:21 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Debian SDK Not booting in am62p (Am62x dev kit)
- Rajkumar, Note I added pre tags around your code dumps. You have been using the @ symbols but that only works for single lines. You can easily add the pre tags by highlighting what you want marked as code and then hitting the pre butto...
- MW 10:06 AM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Debian SDK Not booting in am62p (Am62x dev kit)
- When you run the example on the TI EVM (with SDK 10.1 + RT config), do you see 1000 Hz performance or the same 600 Hz performance?
- RD 05:46 AM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Debian SDK Not booting in am62p (Am62x dev kit)
- Hi Mike,
We have pulled the Ubuntu-based Docker container on top of the MitySOM SDK 10.01.
We built the kernel using the following command:
make O="$BUILDDIR" defconfig ti_arm64_prune.config mitysom-am62xx-devkit.config ti_rt.config...
05/05/2025
- MW 12:12 PM MitySOM-AM57X PCB Development: RE: I/O voltage levels
- The SOM ties the following AM57x voltage IO domains to 1.8V. You will need to use level shifters on your board to get to +3.3V IO interfaces.
VDDSHV1
VDDSHV2
VDDSHV3
VDDSHV4
VDDSHV6
VDDSHV7
VDDSHV9
VDDSHV10
VDDSHV11
VDDSHV... - BS 12:01 PM MitySOM-AM57X PCB Development: RE: I/O voltage levels
- Hello Mike,
Thank you for your swift and helpful response.
We are planning to use I2C3, I2C4, and I2C5 interfaces of AM57XX in our design.
Kindly correct us if we are mistaken — as we understand from the documentatio... - MW 11:41 AM MitySOM-AM57X PCB Development: RE: I/O voltage levels
- Hello,
You should use level shifters to shift up to 3.3V. Do not pull the I2C pins directly to 3.3V or modify the SOM.
Our Dev Kit schematic uses TCA9803DGKR, but there are several shifters avialable that should work.
Which I... - In the data sheet of MITY-SOM_AM57F SOM board page 4, it is mentioned that the AM57XX MFIOs are operating at 1.8V level except mmc1 pins. We have an I2C connections that goes to AM57XX processor, we need the voltage levels of the I2C pin...
05/02/2025
- RD 01:06 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Debian SDK Not booting in am62p (Am62x dev kit)
- Hi Mike,
The U-Boot build is working fine. I haven't tried the SD card image you mentioned yet, but I will try it and update you.
Thank you.
05/01/2025
- JC 07:43 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Debian SDK Not booting in am62p (Am62x dev kit)
- Updated 10.1 62A images have been released. https://support.criticallink.com/redmine/projects/mitysom_am62x/wiki/Repositories_and_Pre-built_Images#MitySOM-AM62Ax-Development-Kit-SD-Card-Image
04/30/2025
- JC 03:45 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Debian SDK Not booting in am62p (Am62x dev kit)
- I also just pushed the commit to the mitysom-u-boot-2024.04 u-boot branch. So you could build u-boot and update the 10.1 SDK sdcard image. Similar to how you did the debian image.
https://support.criticallink.com/gitweb/?p=u-boot-ti.g... - JC 02:13 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Debian SDK Not booting in am62p (Am62x dev kit)
> Card did not respond to voltage select! : -110
> ...
I was just looking into this error case last week. Do you happen to be using a sandisk sdcard?
In the 10.1 SDK u-boot, TI has enabled UHS mode in u-boot to allow booting fas...- RD 01:07 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Debian SDK Not booting in am62p (Am62x dev kit)
- Hi Mike,
Hope you're doing well.
We received the AM62A SoM today from Critical Link and inserted it into the AM62x Development Kit.
We flashed the SD card with the reference microSD card image (tisdk-default-image-mitysom-am62ax.roo...
04/29/2025
- JC 01:43 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Debian SDK Not booting in am62p (Am62x dev kit)
- > I ran the 62xx-build-dts.sh script, but it threw an error because it was unable to find the .config file
Thanks for pointing this out. I'd never tried using the dts script without already having run the full build. But this can be... - MW 12:54 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Debian SDK Not booting in am62p (Am62x dev kit)
- Glad you got it fixed! (our comments passed each other!)
- MW 12:53 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Debian SDK Not booting in am62p (Am62x dev kit)
- Can you check if you disabled the MCAN0 mux options? Usually the first device to claim the resource wins, so if MCAN initializes first it might claim the pins on you.
make sure the lines below are commented out in k3-am62px-mitysom-d... - RD 12:46 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Debian SDK Not booting in am62p (Am62x dev kit)
- Hi Mike,
Update on the above comment:
It is working now. The issue was that pins B23 and F20 were already being used in the main_gpio_p3_pins_default node for the P3 connector. I commented out those two pins, and now UART5 has started ... - RD 11:54 AM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Debian SDK Not booting in am62p (Am62x dev kit)
- We’ve now implemented the changes you suggested, and the OS is working fine.
Since we only copied the U-Boot and device tree from the Critical Link (CL) build into the TI file system, we needed to explicitly enable main_uart5 in the d...