Mity CPU Platforms

08/04/2023

DV 05:42 PM MitySOM-A10S Altera Arria 10 Software Development: RE: Mitysom a10s does not start under U-Boot 2021.04

Hi Dmitry,
Your pin out and clock project look to be correct. If you're seeing clocks on the output of U15 then I would say it's programmed correctly. To double check that the FPGA receives it can you route one of the clocks to an FP... Daniel Vincelette

08/02/2023

DK 04:36 PM MitySOM-A10S Altera Arria 10 Software Development: RE: Mitysom a10s does not start under U-Boot 2021.04

Hi
You are right. My board is rev 4.
I changed the U15 configuration and currently I use CLK0 (pins R24/R23) and CLK1 (pins AB15/AA16).
But result is the same ((
I see signals on the pins of SI5338, but don't see the signals in sig... Dmitry Kolotsei

08/01/2023

DV 02:32 PM MitySOM-A10S Altera Arria 10 Software Development: RE: Mitysom a10s does not start under U-Boot 2021.04

Hi Dmitry,
The revision is at the end of the 80-# number of the white tag. For example, 80-001124RC-*4*A is a rev 4 of the 80-001124 part number.
My recommendation is the following:
* Use U15 CLK0 and CLK1 because these don't move... Daniel Vincelette

DK 08:03 AM MitySOM-A10S Altera Arria 10 Software Development: RE: Mitysom a10s does not start under U-Boot 2021.04

Hi
I have rev 9 board and working in accordance with datasheet pointed by you.
You can make sure in that by screenshots attached by me.
Best regards. Dmitry Kolotsei

07/31/2023

DV 06:15 PM MitySOM-A10S Altera Arria 10 Software Development: RE: Mitysom a10s does not start under U-Boot 2021.04

Hi Dmitry,
It looks like you are using the pinout from the rev 8 of our SOM but I believe you have an earlier rev of the SOM.
Your SOMs should follow the clocking that is in our datasheet (Figure 2).
Datasheet: https://www.crit... Daniel Vincelette

07/30/2023

DK 02:21 PM MitySOM-A10S Altera Arria 10 Software Development: RE: Mitysom a10s does not start under U-Boot 2021.04

Hi Dan,
Thank you for the reply.
I added proposed assignments.
I recreated the differential signals on pins. Quartus automatically added paired signals with '(n)' in the end of names.
I got state when there are not any question sig... Dmitry Kolotsei

07/28/2023

DV 05:33 PM MitySOM-A10S Altera Arria 10 Software Development: RE: Mitysom a10s does not start under U-Boot 2021.04

Hi Dmitry,
Do you have differential terminations enabled for these signals? If not that might be the issue. The syntax for adding these to qsf looks like the following: Daniel Vincelette

DK 05:11 PM MitySOM-A10S Altera Arria 10 Software Development: RE: Mitysom a10s does not start under U-Boot 2021.04

Hi all,
SI5338 is working correct, I see right frequencies on output pins (CLK0A, CLK0B, CLK2A, CLK2B) of chip U15.
But FPGA project does not receive these signals.
I coded simple counter (module cycle_gen) and instantiate it on eac... Dmitry Kolotsei

JC 11:02 AM MitySOM-AM57X Software Development: RE: ICE cannot be connected to SOM without FGPA

Glad to hear it. Jonathan Cormier

MF 01:56 AM MitySOM-AM57X Software Development: RE: ICE cannot be connected to SOM without FGPA

By shorting pins 4 and 8, we were able to connect the ICE to the CPU. Masayoshi Furuta

07/27/2023

JC 04:03 PM MitySOM-AM57X Software Development: RE: ICE cannot be connected to SOM without FGPA

On J4, the TDIS signal is supposed to be connected to GND. I tested the connection on a module by shorting pins 4 and 8 using tweezers and was able to connect to the ARM over JTAG.
!clipboard-202307271201-phbgc.png!
Are you able t... Jonathan Cormier

JC 02:46 PM MitySOM-AM57X Software Development: RE: ICE cannot be connected to SOM without FGPA

I was able to reproduce your results on a 5746-PX-4AA-RI Rev2A. We will look into this. Jonathan Cormier

MF 07:33 AM MitySOM-AM57X Software Development: ICE cannot be connected to SOM without FGPA

I am having trouble making ICE connections with the following SOM
　・5728-PX-4AA-RI
　・5729-PX-4AA-RI
　・5746-PX-4AA-RI
In addition, the ICE connection is working for "5749-PM-4AA-RI" by the same operation.
■ICE can NOT connect t... Masayoshi Furuta

07/19/2023

DK 09:04 AM MitySOM-A10S Altera Arria 10 Software Development: RE: Mitysom a10s does not start under U-Boot 2021.04

Hi, Dan
Thank you very much for help.
PLL is reconfigured.
Dmitry Dmitry Kolotsei

MF 07:00 AM MitySOM-AM57X PCB Development: RE: Unconnected pins, board dimensions and hole positions

1.The J1 and J3 connectors of "MitySOM-AM57 (non-FPGA variant)" are described as “MFIO” for “Type”.
"If this pin is not used, can it be left unconnected?"
(Table 6, Table 7 in MitySOM-AM57_datasheet.pdf)
2.The J1 and J3 connectors o... Masayoshi Furuta

07/18/2023

DV 06:46 PM MitySOM-A10S Altera Arria 10 Software Development: RE: Mitysom a10s does not start under U-Boot 2021.04

Hello,
I have found a deficiency in our instructions, the register header files needs to be manually updated in order to enable the outputs. I updated the steps in the https://support.criticallink.com/redmine/projects/mitysom_a10s/wik... Daniel Vincelette

DK 03:20 PM MitySOM-A10S Altera Arria 10 Software Development: RE: Mitysom a10s does not start under U-Boot 2021.04

h-files for generating bin-files Dmitry Kolotsei

DV 03:04 PM MitySOM-A10S Altera Arria 10 Software Development: RE: Mitysom a10s does not start under U-Boot 2021.04

Hi Dmitry,
Can you please attach your header files that you used to generate the 2 binaries as well?
Thank you,
Dan Daniel Vincelette

DK 02:54 PM MitySOM-A10S Altera Arria 10 Software Development: RE: Mitysom a10s does not start under U-Boot 2021.04

Hi, Dan
Thank you for help.
This image is started.
Next step. I prepared U14PLL.bin in accordance with recommendation on page https://support.criticallink.com/redmine/projects/mitysom_a10s/wiki/Customizing_the_On_Board_Silicon_Lab... Dmitry Kolotsei

DV 02:03 PM MitySOM-A10S Altera Arria 10 Software Development: RE: Mitysom a10s does not start under U-Boot 2021.04

Hi Dmitry,
We have just recently found an issue with the released SD cards for the 480KLE version of the SOM, which causes them not the boot. I have uploaded a new version, which fixes the boot issue.
Please try the following SD ca... Daniel Vincelette

DK 11:22 AM MitySOM-A10S Altera Arria 10 Software Development: Mitysom a10s does not start under U-Boot 2021.04

Hi all.
I need to change the on-board PLL configuration to get the frequency 322.265625 MHz.
I am trying to use U-boot version 2021.04 with board A10S-P9-X5E-RI-SA. Because, as I know, only U-Boot version 2021.04 supports the loading... Dmitry Kolotsei

MW 11:59 AM MitySOM-AM57X PCB Development: RE: Unconnected pins, board dimensions and hole positions

Hello,
To be clear, this information is for the MitySOM-AM57 (non-FPGA variant). I am sorry I was thinking you were referring to the FPGA variant of the MitySOM-AM57F.
For the pins in question:
　J1-99 (AB16) - the SOM includes... Michael Williamson

MF 01:58 AM MitySOM-AM57X PCB Development: RE: Unconnected pins, board dimensions and hole positions

> If you have specific pins that are of concern, please let us know which ones.
Is it okay to leave the following signals open when not in use?
　J1-99 (AB16)
　J1-101 (D21)
　J3-8 (C25)
　J3-10 (F17)
Looking at the AM5728 (TI) dat... Masayoshi Furuta

07/17/2023

TC 02:15 PM MitySOM-AM57X PCB Development: RE: Is the USB SS connection correct?

Thanks, Jon!
Tom Thomas Catalino

JC 02:01 PM MitySOM-AM57X PCB Development: RE: Is the USB SS connection correct?

Thanks for pointing that out. Posted updated schematics and noted them on this new wiki page. https://support.criticallink.com/redmine/projects/mitysom_am57x/wiki/Development_Kit_Revision_Information Jonathan Cormier

SS 08:49 AM MitySOM-AM57X PCB Development: RE: Is the USB SS connection correct?

Hi,
Can you please share the schematic design file location in the website. I am getting old schematic design from the "files" link.
With regards
Sandeep S Sandeep Sivadas

07/14/2023

JC 01:05 PM MitySOM-AM57X PCB Development: RE: Is the USB SS connection correct?

Here is a snapshot from the devkit design in case it helps. The full schematic is available in the files section.
!clipboard-202307140903-bbh2e.png!
!clipboard-202307140904-01axr.png!
Jonathan Cormier

MW 09:35 AM MitySOM-AM57X PCB Development: RE: Is the USB SS connection correct?

Hello,
I had edited my previous post to correct. Yes it is:
Correct: AM572x (USB_TXN/P0)
The 80-001317RH-5_SCH_RevA.PDF should properly connect the USB-3. You can assume it is OK.
-Mike Michael Williamson

MF 01:19 AM MitySOM-AM57X PCB Development: RE: Is the USB SS connection correct?

> MitySOM-AM57 System on Module (J3, J14)) ~ HD3SS3220IRNHR (U12) ~ USB TypeC (J13) connection (SSTX_P / _N, SSRX_P / _N) is there any problem with the circuit diagram below?
> ...
Can I assume that aside from the pin names, there are n... Masayoshi Furuta

07/13/2023

MF 10:39 PM MitySOM-AM57X PCB Development: RE: Is the USB SS connection correct?

> Pin 33/35 are connected to AC11/AD11 on the *FPGA* (USB_TXN/P0), with AC coupling (DC blocking) capacitor.
Will this one also be corrected as follows?
Incorrect: FPGA (USB_TXN/P0)
Correct: AM572x (USB_TXN/P0)
Masayoshi Furuta

JC 02:22 PM MitySOM-AM57X PCB Development: RE: Is the USB SS connection correct?

Correction: Replace FPGA with ARM Jonathan Cormier

MW 10:25 AM MitySOM-AM57X PCB Development: RE: Is the USB SS connection correct?

Hi Masayoshi,
It looks like there is an error in the datasheet.
Pin 33/35 are connected to AC11/AD11 on the FPGA (USB_TXN/P0), with AC coupling (DC blocking) capacitor.
Pin 27/29 are connected to AF12/AE12 (USB_RXN/P0) as straig... Michael Williamson

MF 06:39 AM MitySOM-AM57X PCB Development: Is the USB SS connection correct?

The J3Pin-Out (Table 7) of the MitySOM-AM57 System on Module data sheet describes the USB3.0 SuperSpeed terminals as follows.
Pin27 AC11 USB1_SSRX_N
Pin29 AD11 USB1_SSRX_P
Pin33 AF12 USB1_SSTX_N(2)
Pin35 AE12 USB1_SSTX_P(2)
... Masayoshi Furuta

SP 03:11 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Qemu pointers to try out mitysom-5csx Cyclone V Arm cortex a9 code

Hi Dan,
Thanks for the response. We do not have an actual hardware to do basic testing of the code. We are developing an application with UBoot-uCOS - no linux.
Thank you,
Saumil Saumil Patel

07/12/2023

DV 06:44 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Qemu pointers to try out mitysom-5csx Cyclone V Arm cortex a9 code

Hi Saumil,
We do not have any experience using QEMU, our development is normally done on the actual hardware.
Most of our development for the Cyclone V is done for embedded Linux. This would allow us to build for x86 and run a linu... Daniel Vincelette

SP 05:49 PM MitySOM-5CSX Altera Cyclone V Software Development: Qemu pointers to try out mitysom-5csx Cyclone V Arm cortex a9 code

Hello,
Is there a wiki or any pointers to simulate using QEMU? I ran .\qemu-system-arm.exe -machine help and it lists out boards and I am not sure which one to pick.
Thank you for help,
Saumil Saumil Patel

07/10/2023

TC 01:57 PM MitySOM-AM57X PCB Development: RE: about MECHANICAL INTERFACE in AM57x DataSheet

Thank you for pointing this out. We will repair the figure references in the next revision of the datasheet. In both cases the erroneous reference is to the figures directly below the text where the error appears. Thomas Catalino

MF 12:47 AM MitySOM-AM57X PCB Development: about MECHANICAL INTERFACE in AM57x DataSheet

https://www.criticallink.com/wp-content/uploads/60-000055-MitySOM-AM57_datasheet.pdf
On P29 and P31 of the DataSheet.
You find "Error! Reference source not found."
Please update document.
Masayoshi Furuta

07/07/2023

SP 03:33 PM MitySOM-5CSX Altera Cyclone V Software Development: How do I use ARM FVP or any other virtualization?

Hello,
Our application is MitySOM-5CSx based. We are trying to use FVP or QEMU for simulation during firmware development.
I have been trying to get the ARM FVP with AC5 to work but no success so far. How can I achieve this?
Thank... Saumil Patel