Activity
From 03/14/2022 to 04/12/2022
04/06/2022
- DV 12:33 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: MitySOM 5CSX-H6-53B-RC not booting
- Hi Franz,
Based off your boot log the board is stuck at the preloader, before getting into u-boot. The preloader/u-boot are built using outputs from the firmware build, the preloader get's it pinmux/DDR settings from the options you s... - FS 12:14 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: MitySOM 5CSX-H6-53B-RC not booting
- Hello Dan,
I made the changes you suggested and the same issue is still there, at this point I don't think the issue is with the firmware files. You mentioned that the preloader/u-boot images would be different, are there any other ch...
03/31/2022
- DV 11:31 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: MitySOM 5CSX-H6-53B-RC not booting
- Hi Franz,
One difference that stands out to me is the INPUT/OUTPUT TERMINATIONs used. Because the SOM uses a different RZQ value than the defaults that quartus use please change the HPS DDR INPUT_TERMINATION/OUTPUT_TERMINATION for the... - FS 02:23 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: MitySOM 5CSX-H6-53B-RC not booting
- Hello Dan,
I have attached the .qsys and .qsf files. These have the instances added as well as the row address width set to 16 so I'm not sure what other change is needed, maybe the clock needs to be changed for the 53B-RC?
Thanks,...
03/30/2022
- JC 01:40 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Is it possible to use C++ 11?
- Also, Make sure to add the "-std=c++11" flag to the g++ compiler to actually enable c++11 features.
- VK 01:06 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Is it possible to use C++ 11?
- Hello Mike,
That's exactly what I wanted to know. Thank you very much for your prompt reply :)
- MW 12:45 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Is it possible to use C++ 11?
- Hi Vadym,
Yes. Are you referring to the DSP programming or the ARM programming?
For the ARM, the version of GCC in the 2018 toolchain is 4.8.3. According to "this page":https://gcc.gnu.org/gcc-4.8/cxx0x_status.html, all of the c+... - I would know is it possible to apply the c++11 standard during development?
03/27/2022
- DV 06:14 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: MitySOM 5CSX-H6-53B-RC not booting
- Hi Franz,
For the issue with the 53B SOM hanging at "Initializing SDRAM ECC" the device tree doesn't come into play, at this point the SOM would only care about the preloader. From a highlevel your soc_sys.dts looks ok.
Dan
03/25/2022
- FS 09:42 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: MitySOM 5CSX-H6-53B-RC not booting
- Hello Dan,
I did already have those instances added to my .qsf. Before I share my .qsys and .qsf files I would like to verify if my device tree files had the correct changes, I have attached all the ones being used here. The changes b...
03/21/2022
- DV 12:02 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: MitySOM 5CSX-H6-53B-RC not booting
- Hi Franz,
I don't believe changing the pin mux like you have would cause the preloader to hang at initializing the DDR, this normally occurs if the row width wasn't adjusted to account for the extra size. Also you are right the row ad...
03/16/2022
- DV 08:21 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Differences in 5CSE-L2-3Y8-RC production runs?
- Hi Lucas,
That is an interesting finding, I'm not aware of any reports of lot to lot clock instabilities. Are you passing the HPS user clock to the FPGA as your main clock source for your FPGA design or is your FPGA being clocked by a... - Hello. We've been doing some troubleshooting on prototype units that use the 5CSE-L2-3Y8-RC for DSP on the FPGA end and further treatment on the ARM CPU side and were puzzled by two units with fairly similar behavior on the analog front ...
- FS 05:39 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: MitySOM 5CSX-H6-53B-RC not booting
- Hello Dan,
Unfortunately, the boot still stalls with SDRAM_SCRUBBING enabled. As for the HPS instance, the only differences are the added FPGA to HPS interface and a few different peripheral pins which are an added SPIM0 pin and no QS...