Activity

From 12/18/2020 to 01/16/2021

TC 07:45 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: MityDSP-L138 Starterware Example Code: Hello -
You may wish to post this on one of the TI forums.
We are unable to support TI development kits.
If you are using one of our OMAPL138 based SOM modules in a product we may be able to help.
Thank you Thomas Catalino

SK 06:59 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: MityDSP-L138 Starterware Example Code: Hello
I am working on the LCDKOMAP-l138 board for the timer driver.
When using the Sysdelay function after having used the SysDelayTimerSetup the application hangs.
Studying the source code(platform/beaglebone/sysdelay.c)) the Sysd... Shubham Khot

JC 02:07 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Connecting JTAG to Mity Som335x: I don't believe we ever created a gel file for the MitySOM-335x. We rely on u-boot to configure the RAM and clocks. So side loading over JTAG isn't supported. With some work, you could extract the ram timings from u-boot and modify a ... Jonathan Cormier
AK 12:30 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: Connecting JTAG to Mity Som335x: Hi,
I have tried connecting JTAG XDS100V2 to the Mitysom 335 evaluation board. Changed the boot options to give first boot option as XIP.
While configuring Code Composer CCS10.1 and target configuration section, which .gel file i n... Arjun k

VB 12:16 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Problem when programming FPGA from HPS: Confirmed. After rebuilding Kernel (tested on 3.16 and 4.9.78 versions) and disabling gpio_altera modules FPGA programming is able without HPS stucking.
Thanks. Vladislav Borchsh

VB 07:00 AM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Problem when programming FPGA from HPS: Hello Daniel,
Yes, I have. Ok, I'll try to do your recommendation, thanks.
Vladislav Borchsh

DV 11:29 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Problem when programming FPGA from HPS: Hello,
In your design do you have kernel drivers that are accessing FPGA cores using the HPS to FPGA lightweight bridge? If so then you will need to have these drivers built as kernel modules and unload them before you try to reprogra... Daniel Vincelette
VB 07:16 AM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Problem when programming FPGA from HPS: Dear colleagues,
Are there any solutions of issue with "hot" JTAG FPGA programming? This feature very useful for me, as FPGA developer.
I faced with exactly the same issue: when I start loading FPGA, HPS will stucked. No matter how... Vladislav Borchsh

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