Mity CPU Platforms

10/21/2014

JC 10:28 AM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Communicating with an 8-bit parallel interface (GPIO, SPI or GPMC)

SPI:
I'm not sure what you mean by using the spi bus to handle the 8-bit data bus.
If you want raw access to the spi device then you need to modify the baseboard file. The 3.2 kernel we are using doesn't use device tree, instead the... Jonathan Cormier

JC 10:16 AM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Communicating with an 8-bit parallel interface (GPIO, SPI or GPMC)

As Alex mentioned the GPMC bus is used for an on-SOM nand memory. The GPMC bus allows multiple devices to use the bus as long as they only communicate when their chip select is high. Does your device have someway to ignore communicatio... Jonathan Cormier

10/20/2014

AB 04:55 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: Communicating with an 8-bit parallel interface (GPIO, SPI or GPMC)

Posting this on behalf of a customer:
The interface to their networking chip and other peripheral boards on their current motherboard is through memory mapped I/O. The customer would like to recreate this with the MitySOM-335x and is ... Alexander Block

04:34 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Modular SGDMA

Hi Dan,
I polling the FIFO empty signal for the both the dispatcher and write master to ensure that only when both FIFOs are empty when I will continue.
The delay varies, it's hard to predict.
Ideally we don't want to put any sl... Anonymous

10/17/2014

DV 04:53 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Modular SGDMA

Hi Jack,
You could try polling the dispatcher's busy bit instead but I'm not quite sure if that would solve your issue. Any idea at how long the delay is for? Does the FIFO overflow because of it? Also you might want to put a bit of a... Daniel Vincelette

03:57 PM MitySOM-5CSX Altera Cyclone V FPGA Development: Modular SGDMA

Hi
I'm running into a difficulty with the Modular SGDMA that is used in the HPS Memory example.
I have to send dispatchers repeatedly in a infinite loop. I have it designed such that after I send the command to write the dispatcher... Anonymous

10/02/2014

12:53 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: HPS Memory Controller

Hi,
Just raising this subject again. I'm going through the document for the sgdma_dispatcher, but do you guys have an example where you check to see if the dispatcher has finished transferring?
I tried reading the CSR Status regist... Anonymous

10/01/2014

02:27 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Port 22222

Actually, the issue seems to be with the third party software.
So don't worry about it. Anonymous

02:07 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Port 22222

Furthermore, ssh works to it.
We have a python program that tries to connect to the board via port 22222, but it returns an error stating that connection is actively refused. Anonymous

01:58 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Port 22222

Hi Bob,
The only file I changed is the interface file in the /etc/network folder to give the system a static address on starting. The only thing now in the file is this.
auto eth0
iface eth0 inet static
address 192.168.2.12
ne... Anonymous

BD 01:44 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Port 22222

Jack, I'm assuming you are running the "third party software" on the PC, correct?
If so, how did you configure the MitySOM-5CSX baseboard to listen to port 22222? Please attach the files you changed. Are you using a custom server on... Bob Duke

01:19 PM MitySOM-5CSX Altera Cyclone V Software Development: Port 22222

Hi,
We are trying to have a third party software to connect to the board via Port 22222. We assigned a static address to both the PC and the Mityboard. We are able to ping at each other from both (but that's using port 22 on putty). A... Anonymous

MK 02:31 AM MitySOM-335x (ARM Cortex-A8 Based Products) PCB Development: RE: Spurious Reboot Debug

Yes. Where do I send it?
Michael Karasoff

09/30/2014

12:41 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Static IP Adderess

Hi Dan,
That works! Thank you!
Jack Anonymous

DV 09:26 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: Static IP Adderess

Hello Jack,
Is your PC a windows machine? If so I believe if you have the firewall on then it will block any ping requests. So if you disable your firewall on your PC then that might solve this issue. Let me know how it goes.
Dan Daniel Vincelette

09/29/2014

06:54 PM MitySOM-5CSX Altera Cyclone V Software Development: Static IP Adderess

Hi,
I tried to set a static IP address to the system, by changing the /etc/network/interface file (See below). Because we want to communicate it directly via ethernet without the USB cable.
The issue is that having assigned IP addr... Anonymous

09/26/2014

MW 09:11 PM MitySOM-335x (ARM Cortex-A8 Based Products) PCB Development: RE: Spurious Reboot Debug

Would you be willing to share (privately, not on the forum) your baseboard schematic?
-Mike Michael Williamson

MK 08:19 PM MitySOM-335x (ARM Cortex-A8 Based Products) PCB Development: RE: Spurious Reboot Debug

Michael,
Thanks for the replay. No problem with the many questions.. I'm kind of at a loss tracking down the issue, so any tips can help.
_Are these MityARM-3359s? What is the model number? Do you also have a couple of serial num... Michael Karasoff

MA 02:27 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: GP0[4] state on boot for L138F

??How quickly do you need it to be low? You might put an external pull down on your board.??
Pretty much instantly would be ideal as we use it as a /SHUTDOWN control for some hardware that should only be brought up once the Mity is fu... Mostafa Afgani

09/25/2014

MW 07:46 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: GP0[4] state on boot for L138F

How quickly do you need it to be low? You might put an external pull down on your board.
You could disable the pull up, but keep in mind the OMAP-L138 controls for the pull up are in groups, so you will affect other pins when you dis... Michael Williamson

MA 05:11 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: GP0[4] state on boot for L138F

Hi Mike, thanks for the explanation. As we need this pin to be low on power-up, would the best place to set this be in the U-Boot mityomap config/init code? Mostafa Afgani

MW 03:40 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: GP0[4] state on boot for L138F

Hi,
If you check the OMAP-L138 datasheet (it's a bit convolved) Table 2-29, the GP0[4] pin pullup state is defined by CP[2] group control in the PUPDENA / PUPDSEL registers after reset completes (during reset it should be pulled down)... Michael Williamson

MA 03:28 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: GP0[4] state on boot for L138F

Hi, we noticed that the power on state of GPIO_0_4 is that it is driven high. I am a little confused about this since I can't see anything in the U-Boot source code (u-boot-mitydspl138/board/davinci/mityomapl138/) changing PINMUX1 from t... Mostafa Afgani

09/24/2014

MW 05:59 PM MitySOM-335x (ARM Cortex-A8 Based Products) PCB Development: RE: Spurious Reboot Debug

Hi Mr. Karasoff,
Are these MityARM-3359s? What is the model number? Do you also have a couple of serial numbers of the modules that are exhibiting the problem?
Does the reboot issue track the SOM or the Carrier board? E.g., if y... Michael Williamson

MK 05:28 PM MitySOM-335x (ARM Cortex-A8 Based Products) PCB Development: Spurious Reboot Debug

Hi,
I am having an intermittant issue with the MityARM on some (not all) of our custom carrier boards - The processor has spurious reboots. The processor will boot and run Linux fine, then it reboots on its own, starting at the bootl... Michael Karasoff

09/23/2014

SB 02:05 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: UPP problem

Problem was caused by cache incoherency. Use of BCACHE_inv() fixed it. stephan berner

09/22/2014

JC 10:19 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: USB Bug

There are several missing features in the 3.14 branch that I found when trying to move to it. I created a tag to mark my findings.
http://support.criticallink.com/gitweb/?p=linux-davinci.git;a=tag;h=refs/tags/3.14_Note
I'm not sure o... Jonathan Cormier

JC 10:13 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: USB Bug

Note that we have seen a similar issue on the 335x. Could you checkout the following page and report back if the solution helps?
https://support.criticallink.com/redmine/projects/armc8-platforms/wiki/Using_USB_port Jonathan Cormier

BK 10:11 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: USB Bug

It is from your git page - as far as I remember. Our software student tried to jump to 3.14 two month ago but it didn't work completly so we jumped only to 3.7. as this seemed to work. Benedikt K.

MW 09:39 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: USB Bug

Hello,
Are you using a 3.7 branch from our git site, or the mainline? I don't think we officially support 3.7. Do you see the same behaviour in 3.2?
-Mike Michael Williamson

BK 09:37 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: USB Bug

Another thing: When I plug in the first usb device the number of usb interrupts in /proc/interrupts increases. When I unplug it, it stops as expected. But not a single interrupt happens when I plug in another device after unplugging the ... Benedikt K.

BK 09:22 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: USB Bug

Hej hej,
we have noticed a usb bug on the MityDSP and we are not sure why this happens.
We are using linux 3.7.0+-kernel with our own baseboard. The socket is configured and initialized as USB_HOST (with mityomapl138_usb_init(MUSB_... Benedikt K.