Activity
From 01/24/2014 to 02/22/2014
02/22/2014
- MW 07:48 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: Yocto Plug-In Python.exe Error
- Can you post a capture of your complete shell interaction?
02/20/2014
- JC 04:20 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Booting from Nand
- Excellent this is a known issue. On boot the filesystem will try to calibrate the touch screen if its calibration file is missing. This is impossible to do if you don't actually have a touchscreen. Its looking for a @pointercal@ in th...
- BJ 03:27 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Booting from Nand
- Hello again,
Thank you for your help so far; I have been making progress, but still stuck on the NAND boot. After booting the kernel and mounting the NFS filesystem, here is where is gets stuck: - DV 02:39 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: HPS Memory Controller
- Nope, if you connect it to the HPS to FPGA bridge you can treat it more like a register that the code on the HPS reads. You could also use the FPGA to HPS bridge to write to a specific location in memory, though I have no experience with...
-
01:10 PM
MitySOM-5CSX Altera Cyclone V
FPGA Development: RE: HPS Memory Controller
- Hi Dan,
Don't you mean connect it to the FPGA to HPS AXI bridge?
Our input data is processed in the FPGA.
Thanks!
Jack - DV 01:03 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: HPS Memory Controller
- At that rate it might be simpler to create a FIFO in the FPGA and connect it to the light weight HPS to FPGA bridge. Then have the HPS poll that register continuously. We've run that interface at 100Mhz, mainly for control and status reg...
02/19/2014
-
05:33 PM
MitySOM-5CSX Altera Cyclone V
FPGA Development: RE: HPS Memory Controller
- Also, I'm trying to by pass the SGDMA dispatcher and use the write master directly.
Jack -
05:32 PM
MitySOM-5CSX Altera Cyclone V
FPGA Development: RE: HPS Memory Controller
- Hi Dan,
Our data is coming in at about 40 MHz,
Jack - DV 04:57 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: HPS Memory Controller
- Hi Jack,
Looking in the SGDMA dispatcher core user guide, it appears that if you use the extended descriptors you can set the write stride to zero, which would allow you to continuous write to the same address.
What is your require... -
04:33 PM
MitySOM-5CSX Altera Cyclone V
FPGA Development: RE: HPS Memory Controller
- Hi Dan,
Regarding the SGDMA Write Master Core. I looked through the document for this core and it doesn't give any information on these questions.
For the write command sink port, what exactly is the purpose of "write stride" (91-7... - DV 03:40 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: HPS Memory Controller
- Jack,
We do not currently have an example that uses a non-packetized Avalon stream. There should be an option in the SGDMA controller to disable packets but we haven't tried to use it.
Dan -
03:22 PM
MitySOM-5CSX Altera Cyclone V
FPGA Development: RE: HPS Memory Controller
- Hi,
Do you have any write to HPS memory examples where I can send data into the memory in a continuous stream rather than a packet at a time?
Thanks!
Jack - MP 08:15 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Why is MityDSP-L138F UPP transmit sometimes giving UOR events
- We leave it at 300 Mhz
- MW 08:08 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Why is MityDSP-L138F UPP transmit sometimes giving UOR events
- When you boot linux, are you changing the CPU OPP to 456 MHz or leaving it at 300 MHz?
- MP 08:03 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Why is MityDSP-L138F UPP transmit sometimes giving UOR events
- Hello,
Yes we have adjusted the bus master priority of uPP, but did not see any great improvements (strangely).
We have tried to set the uPP clock div to 1 (so 37.5 MHz) and the errors were flying. - MW 07:42 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Why is MityDSP-L138F UPP transmit sometimes giving UOR events
- Did you check / adjust your UPP Bus master priorities?
- MP 07:33 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Why is MityDSP-L138F UPP transmit sometimes giving UOR events
- Hello,
Just a quick update. When we do not boot into linux (just uboot) we do not see
these errors.
So booting linux has somehow influence on the uPP performence.
Again thanks for any assistants in this matter
02/18/2014
- GG 08:50 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Why is MityDSP-L138F UPP transmit sometimes giving UOR events
- Hi Marc,
Here are a couple of other things to consider:
# In the past we've had throughput problems with TI's uPP drivers. That was a couple years ago, so maybe the drivers are improved or will work fine for your scenario. However... - MW 08:22 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Why is MityDSP-L138F UPP transmit sometimes giving UOR events
- You might raise the priority up a bit (try 0 or 1). If the transfers are small, then it should be OK to give it priority.
-Mike
- MP 08:04 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Why is MityDSP-L138F UPP transmit sometimes giving UOR events
- Hello,
Here are some answers to the questions:
* Are you trying to run continuous transfers?
- We do not run continuous but every 200 us (5 kHz)
* Do you get the error on every transmit, or periodically?
- No not every... - MW 07:17 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Why is MityDSP-L138F UPP transmit sometimes giving UOR events
- Hi Marc,
Are you trying to run continuous transfers?
At 75 Mhz, you should be running a buffer rep rate of 64 / 75 MHz = 850 ns.
If you are trying to run continuous transfers, that would imply an interrupt rep-rate that fast.
... - MP 02:55 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Why is MityDSP-L138F UPP transmit sometimes giving UOR events
- Hello,
Here are some answers to the questions:
* Are you using the Critical Link MDK drivers? If so, what version of the MDK are you using?
- We use TI's legacy uPP driver
- MDK_2013-05-15
* What is the CPU speed set t... - MW 07:22 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: I2C Bus
- Hi Bruce,
I believe that the I2C addresses for I2C0 are described in the "Carrier Board Design Guide":http://www.criticallink.com/wp-content/uploads/2014/01/MityDSP-L138-Carrier-Board-Design-Guide.pdf.
From section 3.3.8:
_All m... - We are currently investigating a problem accessing the I2C0 bus.
My initial enquiry is to find out what devices are on the MityDSP SOM to insure we are not conflicting.
Our SOM is a L138-DX-225-RI. We are using uBoot to boot t...
02/17/2014
- GG 09:25 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Why is MityDSP-L138F UPP transmit sometimes giving UOR events
- Hi Marc,
If you are following the uPP design guidelines, then perhaps this is a true underflow or overflow condition. I have a number of questions about your project that can hopefully help us narrow down what the cause might be:
... - Hello,
We use the MityDSP-L138F and between DSP and FPGA we use UPP communication but transmit (channel A) is giving sometimes an UOR events.
What could be the cause of this error, we use the recommended clock source (PLL0_SYSCLK2) s...
02/13/2014
- DV 03:02 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Signal Tap & JTAG FPGA Programming
- Glad to hear you got it working.
Dan -
03:01 PM
MitySOM-5CSX Altera Cyclone V
FPGA Development: RE: Signal Tap & JTAG FPGA Programming
- Hi Dan,
Yes it works with the rbf file and it works when I program it in Linux. No problems there.
I managed to get it programming with the JTAG.
Thanks again for your help!
Jack
- DV 01:58 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Signal Tap & JTAG FPGA Programming
- Hi Jack,
I've just created a wiki page for the steps that it takes to program the FPGA using the USB-Blaster, would you mind trying that and telling me where it fails and at what percent of the progress bar it fails at?
The link is... -
12:58 PM
MitySOM-5CSX Altera Cyclone V
FPGA Development: Signal Tap & JTAG FPGA Programming
- Hi,
I'm raised the issue before regarding programming the FPGA with JTAG.
I have tried programming via JTAG, the driver is installed and Quartus does recognize it, but it always fails when I attempt to program it.
I need to use ...
02/12/2014
- JC 04:51 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Booting from Nand
- Looking at the diff I posted the alignment prints out in both cases. This is a normal boot printout.
From your bad log I can see the line that starts with "pvrsrvkm". I'm fairly sure this gets printed by the /etc/init.d/rc.pvr scrip... - BJ 04:00 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Booting from Nand
- Hey Jonathan,
I tried putting a few echo statement in some of the /etc/init.d scripts, but no luck. The boot is stuck at the following line, which I don't see when I am booting from NAND, mounting NFS but with the SD card in its slot:
02/11/2014
- JC 08:53 AM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Booting from Nand
- I would try to look to see if your nfs filesystem is trying to mount the sd card and thus causing it to hang.
Your bad boot log doesn't show the same "Kernel panic - not syncing: VFS: Unable to mount root fs on unknown-block(2,0)" lin... - JC 08:48 AM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Booting from Nand
- I removed the timestamps and did a diff between the two logs and they don't show much difference.
02/10/2014
- BD 02:57 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: "Using TI C64x+ IMGLIB on OMAPL138F"
- Hello Naveen,
As you stated, the vision_framework demo uses the IMG_sobel_3x3_16(), which you can use to understand exactly how the IMG_sobel_3x3_16() function is called (look in file AlgorithmEdgeDetect.cpp).
Regarding the DATA_A... - MF 09:20 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: How to reserve EDMA for DSP
- I tried modifying device-da8xx.c as describe above, but the boot process hung. Here's the relevant part of the log:
02/07/2014
- I am running into the current error while running bitbake:
jliriano@ArmDev:~/yocto/build$ bitbake u-boot
ERROR: Execution of event handler 'external_linaro_toolchain_version_handler' failed
Traceback (most recent call last):
Fil... - JC 11:05 AM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Booting from Nand
- Thanks for the logs. I don't have time to look at them today so I'll try to check them out on Monday.
- BJ 10:17 AM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Booting from Nand
- Hi Jonathan,
So the NFS mount on NAND boot magically started working. I don't think I changed anything. Either way, I am still having a problem: NAND boot mount NFS filesystem ONLY when SD card is still inserted in its slot, else it f...
02/06/2014
- JC 03:21 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: How to reserve EDMA for DSP
- Mary,
I think you can disable the dma usage of the spi driver. I am using the following resource declaration for a different project. Note that the dm365 is a cousin of the l138. - MF 11:03 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: How to reserve EDMA for DSP
- In researching this I found what looks like a similar problem:
http://e2e.ti.com/support/dsp/omap_applications_processors/f/42/t/308987.aspx
This discussion describes how the McBSP freezes when other EMDA accesses occur. I also no... - JC 03:08 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Booting from Nand
- Can you attach the full bootlog in a text file? That error is standard for kernel couldn't find root filesystem.
- BJ 02:23 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Booting from Nand
- Jonathan,
Yes, we were able to mount the NFS root filesystem while booting from the SD card using the new MLO and u-boot files. In fact, we were also able to boot from NAND while mounting the filesystem from the SD card; its just the... - I am attempting to run this command to compile the kernel:
bitbake virtual/bootloader
And get the following error:
ERROR: Execution of event handler 'external_linaro_toolchain_version_handler' failed
Traceback (most recent call ...
02/05/2014
- Hi All,
I can see here (http://support.criticallink.com/rm_embedded/dsp-products/MDK_DOCS/2.11/core/class_mity_d_s_p_1_1tc_dsp_i2c2.html) that there is support for I2C-SMBus. However, in MDK_2013-05-15, I couldn't find the header core... - AS 11:01 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Latest stable linux build for MityARM-1808/F
- Thanks Mike,
That did the works for me.
Cheers,
Angelos - PS 06:49 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: USB-OTG as a peripheral and a host
- Hello Jonathan and Mike,
Thank you for your quick replies.
@Mike
Thank you for your suggestion. I could use it as a file system, but I am interested in transmitting data in real time continuously. In such cases, I will not be able... - Hi,
We have received your Vision Development Kit from Digikey distributor this week. As per your VDK manual we interfaced the kit with mouse, camera and Monitor (with DVI-D input). We have followed the instructions given strictly, als...
02/04/2014
- JC 05:22 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Booting from Nand
- Bindu,
I can't see anything wrong with your environment. Are you able to boot nfs while loading off the sd card with the new files? - BJ 04:18 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Booting from Nand
- Sorry about the formatting on that last post! Yeah turns out using the new files works! The files that come on the SD card are probably not meant for NAND boot.
However, NFS filesystem mount is not working with NAND boot. Is there a s... - JC 03:01 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Booting from Nand
- Your flashing steps look fine. Let me know if anything changes with the new files.
The new sd card image has the latest kernel and u-boot. There were several bug fixes for nand. If you look at the boot/versions.txt file it contains... - JC 02:54 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Booting from Nand
- Can you edit your post and put the output inside pre tags. You can highlight text and hit the pre button above text box.
- BJ 02:45 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Booting from Nand
- Jonathan,
Thank you for moving this over. Kernel version on the board is 3.2.0+. I used the MLO and uBoot file from the SD card provided with the MityARM 335x dev kit. The sizes of these files from the SD card and the link you provide... - JC 08:02 AM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Booting from Nand
- Hi Bindu. Can you confirm that you are using a mlo and uboot that was built with the following config 'mityarm335x_4kpage'. Instructions are here: https://support.criticallink.com/redmine/projects/armc8-platforms/wiki/Das_U-Boot_Port#B...
- Moving post for Bindu. Reference https://support.criticallink.com/redmine/boards/28/topics/1437?r=3602#message-3602
Hello,
Has there been any progress on this? I followed the instructions on this page: https://support.criticallink.... - JJ 02:21 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: WL1271 Calibration tool
- Greg,
Have you been able to get the wifi calibration tool running on the evaluation board?
Thanks
Jesse - JC 01:50 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Accessing SPI1 bus
- Mary,
You can search the kernel source for the messages by using grep. For example I might search for the string "msb first" and look at what files are found containing that text. You could then comment out those print statements. - MF 01:18 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Accessing SPI1 bus
- I have successfully added the SPIDEV support to the kernel and can communicate over the bus now.
I occasionally see messages on the console of the following form: - I am having an ARM/DSP conflict. The DSP is primarily reading data from the McBSP and transferring the data to a circular buffer in DDR memory which is shared with the ARM. The ARM accesses it through a pointer allocated with CMEM.
T... - MW 12:39 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Latest stable linux build for MityARM-1808/F
- In the "file tab":https://support.criticallink.com/redmine/projects/arm9-platforms/files there are MDK downloads (.run files). Instructions for installation are "here":https://support.criticallink.com/redmine/projects/arm9-platforms/wik...
- Hi All,
Could you please tell me what is the Latest stable linux build for MityARM-1808/F? Could you also provide with a link to that?
I have seen that the latest ARM9 based platform is MDK_2013-05-15 but I couldn't find it.
Ki... - MW 08:53 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: USB-OTG as a peripheral and a host
- Probably the best solution would be to load in the USB OTG file storage gadget. This will make the L138 look like a thumb drive.
This link talks about it a bit (for AM335X, but is generally a "linux" thing and should work with L138).... - JC 08:33 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: USB-OTG as a peripheral and a host
- Unfortunately I don't have any experience with interfacing with Android phones. If your Android phone supports rndis this may be the best way to go.
- PS 05:14 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: USB-OTG as a peripheral and a host
- Hello,
I have used RNDIS and have been able to transfer data.
However, I would also like to know how to use either the *USB host* port or the *OTG port* to transfer data without setting up RNDIS.
I am trying to send data from my bo... - JC 07:50 AM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Flashing NAND from SD Card
- Hi Bindu,
A lot has changed since this post was made. I've created you a separate thread that references this one so we can try to work out what may be wrong.
https://support.criticallink.com/redmine/boards/28/topics/3604
02/03/2014
- BJ 07:44 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Flashing NAND from SD Card
- Hello,
Has there been any progress on this? I followed the instructions on this page: https://support.criticallink.com/redmine/projects/armc8-platforms/wiki/UBIFS_Nand_Boot and flashed NAND from Linux. Then I set the appropriate confi... - Posting on behalf of a customer:
- Hi,
I need to set up multicast routing between two interfaces on the mity board running Angstrom linux 2.6.34
I recompiled the kernel with all multicasting options enabled, but "cat /proc/sys/net/ipv4/conf/all/mc_forwarding" gives...
01/31/2014
- JC 01:42 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: MityARM Kernel Versions, TI SDK and PSP Questions
- 1. The CL and TI website suggest Ubuntu 10.04 LTS, but the LINUX kernel version is 2.6.37. How is possible to build 3.2 kernel for SoM on this Ubuntu version?
The kernel that is running on your build machine doesn't have any relation ... - Posting this on behalf of a customer:
- NK 05:14 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: "Regarding handling UART on MitydspL138F(OMAPL138)"
- Hi,
We are trying to interface Second UART (J504 as you mentioned) with Atmel AtXmega Controller so that upon receiving UART interrupts from it we need to enter in to the developed image processing functions.
Since we were told tha...
01/30/2014
- AB 02:22 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: "Regarding handling UART on MitydspL138F(OMAPL138)"
- Naveen,
The first UART is used for the debug/console port, UART1.
You would like to use the second UART in your DSP/ARM code to trigger some processing to occur correct? On the VDK this would be the J504 connector. I have verified ... - AB 01:17 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: "Reagrding spi NOR flash memory updating"
- Naveen,
I'm assuming that the question here is how would you get the updated Kernel from your host PC onto the MityDSP-L138 module to update the kernel in the NOR memory?
1) You are going to be executing the commands over the debug... - GG 10:01 AM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Ethernet
- Edited my response. Good eye Dave. Thanks!
- DR 09:31 AM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Ethernet
- Greg,
Only 2 "e"s in setenv, not three... Jack probably knows that, but just to be clear...
Dave
- GG 09:10 AM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Ethernet
- Hi Jack,
Follow these steps to correct the ethernet:
1. Break into u-boot by resetting the system and hitting any key before the intial countdown finishes.
2. Type the following command:
01/29/2014
-
06:48 PM
MitySOM-5CSX Altera Cyclone V
FPGA Development: RE: Ethernet Rev B
- Hi,
I just received your rev B module. We noticed that the ethernet doesn't work on this revision at all. Is there another way to transfer my fpga and programming file to the linux OS. uBoot will do the FPGA but will it take care of m...
01/27/2014
- DV 12:56 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Load FPGA Timeout Error
- Hi Jack,
I'm not sure what else to try other than trying to program the FPGA through a JTAG pod, which I believe you said you don't have, or sending it back for an RMA.
Dan
01/24/2014
-
01:57 PM
MitySOM-5CSX Altera Cyclone V
FPGA Development: RE: Load FPGA Timeout Error
- Hi Dan,
I did what Adam suggested and it made no difference. I tried it without anything plugged in and still nothing.
Jack - DV 01:21 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Load FPGA Timeout Error
- Currently I do not believe that is the case, seeing as this problem is happening in both uboot and linux.
Have you tried programming the FPGA without anything else plugged in (such as a HSMC card) and setting the MSEL like Adam advise... -
12:28 PM
MitySOM-5CSX Altera Cyclone V
FPGA Development: RE: Load FPGA Timeout Error
- Could this be a OS issue that's causing it?
Can some one direct me the exact link where I can download the img file?
Jack