Activity
From 04/14/2021 to 05/13/2021
05/13/2021
- TR 09:19 PM Software Development: RE: USB OTG - FTDI Device problems
- Hi Dan,
Thanks for the feedback. That got it working!
05/12/2021
- DV 03:15 PM Software Development: RE: Ethernet on MitySoM
- Hi Jonas,
You might not have the phy driver built into your kernel, so the phy skews aren't being set. I believe the config is: CONFIG_MICREL_PHY.
Dan - JM 09:29 AM Software Development: RE: Ethernet on MitySoM
- I apparently used the wrong gpio port, now the reset seems to be working correctly (ethtool shows a PHYAD of 3), but unfortunately i still can't get a higher speed than 10Mbs with sometimes high packet losses.
Jonas
05/11/2021
- JM 12:01 PM Software Development: RE: Ethernet on MitySoM
- Hey Dan,
thanks for the reply.
I created my dts with the sopc2dts tool, but appended the information given in your example, which currently does not seem to help.
Before that i already got it running roughly by calling ethtool -...
05/07/2021
- DV 08:21 PM Software Development: RE: USB OTG - FTDI Device problems
- Hi Travis,
I don't believe the reference project's kernel has built in support for FTDI serial devices. Looking through the kernel I believe you would need to rebuild the kernel with the following support: USB_SERIAL_FTDI_SIO, USB_SER... - Hello,
I am trying to connect a USB-to-RS232 dongle to the USB-OTG port on the MitySOM-5CSE-L2-3Y8 development kit with the reference sd card image running. Using dmesg results in the following:
....
[ 3.638224] usb 1-1: New USB ...
05/05/2021
- DV 05:59 PM Software Development: RE: Ethernet on MitySoM
- Hi Jonas,
From looking at your boot log it looks like the kernel incorrectly found a PHY at address 31, where it should of found it at address 3. This could be caused by the kernel or u-boot not taking the PHY out of reset.
In our...
05/04/2021
- Hello,
I have a MitySoM Module and the accompanying dev kit.
To use ssh and scp, i wanted to enable ethernet. For that I configured a static ip address but no connection is established.
Has someone an idea, what else should be con...
04/30/2021
- DV 02:01 PM FPGA Development: RE: Using Signal Tap with the L2-3Y8 dev kit
- Hi Travis,
I'm sorry for the long delay, are still seeing issues with SignalTap? My normal flow for SignalTap debug especially if the HPS is accessing cores on the bridges is to convert my SOF to a RBF and have u-boot program it on bo...
04/19/2021
- Hello,
I am trying to get Signal Tap working on the my system, but I keep running into failures. I am able to connect a usb-blaster device to the JTAG pins on the white connector. I am also able to find the hardware (usb-blaster) and ... - DV 04:08 PM FPGA Development: RE: Coldstart problem. Loading FPGA through Linux.
- Hello,
I don't believe the RTC error message is related to the FPGA not programming. Can you post a boot log when trying to boot at -40°C? Also just to double-check are you using an industrial temp SD card?
Best regards,
Dan - Hello everyone,
we use the MitySOM module in our project. In works perfectly fine down to -40°C but only if the FPGA is booted at the ambient temperature above 0°C. The HPS part is not used in the project, it`s needed only for booting...