Activity
From 04/22/2020 to 05/21/2020
05/21/2020
- DV 01:01 PM FPGA Development: RE: FPGA programming problems
- Hi Dario,
If you are still seeing it take multiple boots to load the "new" rbf from u-boot then it shouldn't be a device-tree issue. Also if you're using u-boot to program it will handle opening the correct bridges, so those warnings ... - DR 08:18 AM FPGA Development: RE: FPGA programming problems
- I checked the preloader and uboot and are updated. I noticed that in the bootlog the bridges are not initialized:
altera_hps2fpga_bridge soc:fpgabridge@0: fpga bridge [hps2fpga] registered as device hps2fpga
altera_hps2fpga_bridge so...
05/17/2020
- DR 07:07 PM FPGA Development: RE: FPGA programming problems
- Hi Mike,
thank you for the detailed answer. I don’t used interruputs and UART or SPI, but I use the sdram bridge. The preloader should be updated (I will check it to be sure). I agree with you, it is better to change the rbf file and re... - MW 11:44 AM FPGA Development: RE: FPGA programming problems
- Hi Dario,
In your FPGA project, did you modify any of the HPS peripheral settings over your standard load? For example, did you enable or disable a UART or SPI port, or change the SDRAM bridge configurations?
If you did, you will ... - Hi,
I’m working with MitySOM-5CSX-H6-42A development kit and I would like to solve some annoying problems. After generating a new rbf file for programming the FPGA and uploading it to the SD card through sftp, it is necessary to reboot ...