Mity CPU Platforms » MitySOM-5CSX Altera Cyclone V

07/03/2019

MW 11:04 AM FPGA Development: RE: Set timing constraints

Hi Davide,
You really need a constraints file for this to constrain the input timing signals properly based on the ADC datasheet specifications.
There are several (free) online courses available from Intel/Altera about writing timi... Michael Williamson

DV 09:20 AM FPGA Development: Set timing constraints

Dear all,
I have a MitySOM 5CSX-H6-4YA with a Cyclone V SoC installed on a custom board with ADCs and DACs. What I'm trying to do is to digitize an input sinusoid via the ADC and storing it in the internal FPGA RAM via a the RAM 2-POR... Davide Vaccaro

07/01/2019

VJ 11:03 AM Software Development: RE: FPGA PIO interrupt issues with Rocko and kernel 4.9

Hi Wesley
Thank you for the proposed code change, that did the trick!
I think @static DRIVER_ATTR(fpga_uinput, S_IRUSR, fpga_uinput_show, fpga_uinput_store)@ creates the @driver_attr_fpga_uinput@ variable.
BR
VJ V J

06/28/2019

WD 03:53 PM Software Development: RE: FPGA PIO interrupt issues with Rocko and kernel 4.9

Thanks for the log and module code.
We'd like to build this module in an attempt to recreate the issue, but the declaration of @const struct driver_attribute *driver_attr_fpga_uinput@ is not contained in the module code. Could you pro... Wesley Dahar

VJ 10:04 AM Software Development: RE: FPGA PIO interrupt issues with Rocko and kernel 4.9

Hi Dan, thanks for your reply.
I did a quick test where I replaced the 4.9 (RT) zImage with 4.1.22(RT) on my rocko SD card, and then my PIO interrupts worked as expected.
When using the kernel from the rocko branch (ref https://sup... V J

06/27/2019

DV 08:21 PM Software Development: RE: FPGA PIO interrupt issues with Rocko and kernel 4.9

Hello,
We aren't aware of any changes or issues with the PIO interrupts. We haven't been able to recreate the issue that you are seeing here. Could you post your boot log and the section of code that you are using to initialize the gp... Daniel Vincelette

VJ 12:42 PM Software Development: FPGA PIO interrupt issues with Rocko and kernel 4.9

Hi
After upgrading to Rocko and kernel 4.9 (RT) my pio interrupt routine is no longer working. My previous setup was Krogoth with kernel 4.1.22 where my pio interrupts were working fine.
When receiving an FPGA PIO interrupt now I get (... V J

06/26/2019

AA 08:13 AM Software Development: cannot boot a kernel with kexec

I use MitySOM-5CSX dev kit and i would like to boot to a different kernel using kexec.
In my configuration:
KERNEL : https://github.com/altera-opensource/linux-socfpga/archive/socfpga-4.9.76-ltsi-rt.zip
COMPILER : https://rel... aggelis aggelis