Mity CPU Platforms » MitySOM-5CSX Altera Cyclone V

07/13/2017

HB 03:29 PM FPGA Development: RE: I2C Controller

Thank you, this was resolved, turned out to be a problem with our build scripts. Harrison Barclay

07/12/2017

TI 12:06 PM FPGA Development: RE: I2C Controller

Harrison
Whenever you change anything to do with HPS pin assignments, you will need to rebuild the preloader and update it on the boot media (SD card or ROM)
https://support.criticallink.com/redmine/projects/mityarm-5cs/wiki/Building... Tim Iskander

07/11/2017

HB 05:51 PM FPGA Development: I2C Controller

Hello,
Unsure whether to post this under the software or FPGA topic.
We are transitioning from a mostly working system developed on the Mitysom5CSX Devkit to a custom carrier board design (Cyclone V, 5CSX-H6-4YA-RC). In the previou... Harrison Barclay

07/04/2017

TI 03:13 PM Software Development: RE: Accessing NOR flash from Linux on 5CSX

We have a wiki page relating to using the quad spi NOR [primarily centered around booting from NOR]
(https://support.criticallink.com/redmine/projects/mityarm-5cs/wiki/Utilizing_QSPI_NOR_Memory).
The bulk of it is standard linux mtd s... Tim Iskander

BK 08:10 AM Software Development: RE: Accessing NOR flash from Linux on 5CSX

Thanks Tim, that's good news.
Is there any specific doc. for the 5CSZ build? e.g. driver name, build instructions, code location, etc. Any examples kicking about? Do you know if anybody has tried this on the 5CSX?
Kind regards... Bruce Kenny

07/03/2017

TI 05:22 PM Software Development: RE: Accessing NOR flash from Linux on 5CSX

Bruce
Linux has excellent support for NOR flash devices using the mtd subsytem
http://www.linux-mtd.infradead.org/
You can read/write the device (or partition on the device) as a block or install a filesystem (such as jffs or ubifs) o... Tim Iskander

BK 04:53 PM Software Development: Accessing NOR flash from Linux on 5CSX

Our project is currently in the design phase and we are considering using a small amount of NOR flash to read and write some information.
The question is whether there are built in Linux drivers to do this?
We only have a small amo... Bruce Kenny

06/20/2017

AB 05:59 PM FPGA Development: RE: Power fail interrup

Clyde,
Offhand our recommendation would be to utilize an HPS GPIO and have it configured in the GPIO controller as an interrupt.
Additionally it would be pertinent to know how long you expect power to persist after this interrupt ... Alexander Block

CS 05:14 PM FPGA Development: RE: Power fail interrupt

What more is there to say, really? We have a low voltage supervisor in our design and when the power is going to fail, we would like to take the necessary precautions before power is completely gone. Clyde Shappee

DV 04:45 PM FPGA Development: RE: Power fail interrup

Hello Clyde,
Could you describe the situation a bit more?
Thanks!
Dan Daniel Vincelette

CS 02:05 PM FPGA Development: Power fail interrup

What is the recommended input to the SOM for a power fail interrupt?
clyde Clyde Shappee