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From 09/08/2014 to 10/07/2014

12:53 PM FPGA Development: RE: HPS Memory Controller: Hi,
Just raising this subject again. I'm going through the document for the sgdma_dispatcher, but do you guys have an example where you check to see if the dispatcher has finished transferring?
I tried reading the CSR Status regist... Anonymous

02:27 PM Software Development: RE: Port 22222: Actually, the issue seems to be with the third party software.
So don't worry about it. Anonymous
02:07 PM Software Development: RE: Port 22222: Furthermore, ssh works to it.
We have a python program that tries to connect to the board via port 22222, but it returns an error stating that connection is actively refused. Anonymous
01:58 PM Software Development: RE: Port 22222: Hi Bob,
The only file I changed is the interface file in the /etc/network folder to give the system a static address on starting. The only thing now in the file is this.
auto eth0
iface eth0 inet static
address 192.168.2.12
ne... Anonymous
BD 01:44 PM Software Development: RE: Port 22222: Jack, I'm assuming you are running the "third party software" on the PC, correct?
If so, how did you configure the MitySOM-5CSX baseboard to listen to port 22222? Please attach the files you changed. Are you using a custom server on... Bob Duke
01:19 PM Software Development: Port 22222: Hi,
We are trying to have a third party software to connect to the board via Port 22222. We assigned a static address to both the PC and the Mityboard. We are able to ping at each other from both (but that's using port 22 on putty). A... Anonymous

12:41 PM Software Development: RE: Static IP Adderess: Hi Dan,
That works! Thank you!
Jack Anonymous
DV 09:26 AM Software Development: RE: Static IP Adderess: Hello Jack,
Is your PC a windows machine? If so I believe if you have the firewall on then it will block any ping requests. So if you disable your firewall on your PC then that might solve this issue. Let me know how it goes.
Dan Daniel Vincelette

06:54 PM Software Development: Static IP Adderess: Hi,
I tried to set a static IP address to the system, by changing the /etc/network/interface file (See below). Because we want to communicate it directly via ethernet without the USB cable.
The issue is that having assigned IP addr... Anonymous

PB 02:36 PM Software Development: RE: Standard USB peripheral connection on MitySOM eval Board: Hi,
I'm now quite stuck without the ability to use use the host mode.
I have noticed on Rocketboards something recent that seems related to the issue I'm facing :
http://git.rocketboards.org/?p=linux-socfpga.git;a=commit;h=a3a81b0... Pierre-Yves BRETECHER
AB 11:29 AM FPGA Development: RE: Load FPGA Timeout Error: Max,
Thank you for posting that.
You are correct that if VBAT is too low the module will either not boot at all and/or will not allow the FPGA to be programmed. We believe that on earlier development kits the ESD bags may have cont... Alexander Block
MB 10:41 AM FPGA Development: RE: Load FPGA Timeout Error: Hi Dan,
I had similar problem last week. After two week I tried to run my development board loading the FPGA with JTAG and using Uboot.
JTAG was not able to connect and with Uboot the return message was:
altera_load: Failed with e... Massimo Buratto

MW 06:34 PM Software Development: RE: U-Boot with large uImage containing initramfs: Hi Nicholas,
A little confused. Your build_ramdisk_image.sh appears to be building a 1 GB image for loading an SD card, which contains including multiple partitions, etc.
You want to create a raw ext2 or ext3 image only, not a ful... Michael Williamson

NC 04:03 PM Software Development: RE: U-Boot with large uImage containing initramfs: Michael Williamson wrote:
> We've run into this issue before on a different ARM based processor.
> ...
Mike,
I still have had no luck with the initramfs, Just can't get it to go past that Starting Kernel message. I've tried several ... Nicholas Crast

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Mity CPU Platforms » MitySOM-5CSX Altera Cyclone V