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From 03/04/2014 to 04/02/2014

03/05/2014

RI 10:13 AM FPGA Development: FPGA LVDS I/O standard termination
Hi,
I'm currently using the Mity-DSP pro and in my application the FPGA receive LVDS signals as inputs. The MityDSP pro is connected to an in-house extension board.
According to Mity-DSPpro datasheet, the MityDSPpro support 2.5V LV... Romain INGRASCIOTTA
 

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