Activity
From 06/29/2013 to 07/28/2013
07/03/2013
- MW 07:49 AM FPGA Development: RE: How to use the sdram for FPGA and EMIFA bus in MityDSP-Pro board?
- Hello Mr. Feng,
I am attaching the DDR MIG Test Bench that we originally used to validate the FPGA DDR connection. At a minimum, you should find the FPGA connections in the UCF contained within.
The MIG project for this is somewha... - Hello,
Our project needs a large mount of data transfer, so I want to know the assignment of pin for sdram of FPGA and the EMIFA address bus(i_emif_aea), I cann't find them in MityDSP-Pro.ucf. will you give me some FPGA demo for them. ...