Activity
From 01/06/2013 to 02/04/2013
02/04/2013
- MW 08:12 AM FPGA Development: RE: About CE4 CE5 and INT6's pin asisgnment in FPGA
- Hello.
CE4 is connected to W15 of the FPGA (Bank 4).
CE5 is connected to AA15 of the FPGA (Bank 4).
GP [6] is connected to the FPGA_INIT_B signal on the FPGA, AC14. There is also an external 1K pullup to 3.3V on this net.
GP [7] i... - Hi,
I want to design a sync fifo in the FPGA, which will use a synchronous interface in EMIF. So it is better
to use a separate CE pin other than CE2.
According to the MityDspProSpec.pdf, DSP pins CE2 CE4 CE5 INT4 INT5 INT6 are...
01/09/2013
- MW 10:27 AM Software Development: RE: Where can I get user's manual and MDK files for Mitydsp-pro
- Go to the Files tab on this project site and download and install the MityDSP_2_11_0.exe application.
This is a windows installation package and does include some documentation, software, libraries, and some example projects.
-Mike
- I bought 3 Mitydsp-pro moudles. When these moudles were shipped to me, no CDs or other kind of manuals are included.
So now I only have a simple datasheet MItyDSp-pro.Where can I get user's manual and MDK files for Mitydsp-pro?
Haib...