Activity
From 01/17/2012 to 02/15/2012
02/08/2012
- DB 11:51 AM PCB Development: RE: AUX I/O Connector location dimensions
- Thanks Mike,
I have Rev 1/Document Revision: Draft – MityDSP-Pro Rev. B dated Nov 15th 2009 of the design guide and it wasn't in that. I guess there must be a later version. Is the only place to get the documents on the web site were ... - MW 10:58 AM PCB Development: RE: AUX I/O Connector location dimensions
- Hi Doug, dorry for the delay.
The information you need should be in the MityDSP-Pro Carrier board design guide, I am attaching a copy of the figure here. Is this what you need?
-Mike
!MityDSP-PRO-Aux_Connector_Location.png! - DB 10:48 AM PCB Development: RE: AUX I/O Connector location dimensions
- I would like to get a reply to my question. I am finishing up my layout and need to place the connector.
Thanks,
Doug
02/03/2012
- It is recommended to use the AUX I/O connector on the MityDSP-Pro on carrier board designs but I can't seem to find any documentation on the location of the connector. Please let me know if it is called out in any of the documentation. I...
01/26/2012
- BC 01:29 PM FPGA Development: RE: Looking for top-level module for FPGA Hands-on exercise for MDSP-Pro
- Oops! I see it there. Thanks, Mike. That'll work.
- MW 12:51 PM FPGA Development: RE: Looking for top-level module for FPGA Hands-on exercise for MDSP-Pro
- Hi Bob,
Is it not included in the hdl.zip download file? (pulse_gen.vhdl)
-Mike
- Is it possible to get the "answer" top-level module for the MDSP Training Day 1: MityDSP FPGA – Hands-on exercise?
This would be very helpful for me in creating my own module for the MityDSP-Pro.
Thanks.
-Bob Clarke
01/18/2012
- BC 11:23 AM FPGA Development: RE: MityDSP-Pro and host board schematics?
- Mike,
thanks. I will take a look at the info there -- it looks like it will answer a number of our questions. I will contact Tom about the module schematics.
-Bob Clarke - MW 08:11 AM FPGA Development: RE: MityDSP-Pro and host board schematics?
- The Mainboard schematics are available in the "Files Tab":http://support.criticallink.com/redmine/projects/dsp-products/files. Please contact Tom Catalino (catalino@criticallink.com) about the module schematics. If he agrees that the p...
01/17/2012
- BC 05:25 PM FPGA Development: RE: Bank switching for different FPGA applications
- Mike,
my plan was to whip up the application but leave the boot loaders in place for both the DSP and FPGA. I assume that this will be ok if I put my application in the first application storage location. I only plan on using a single a... - MW 05:11 PM FPGA Development: RE: Bank switching for different FPGA applications
- Hi Bob,
The only problem with "whipping stuff up from scratch" will be the fact that the bootloader application provided needs to be able to control the bank-switching serial shift register (via the FPGA) per the addressing scheme def... - MW 05:12 PM FPGA Development: RE: MityDSP-Pro and host board schematics?
- Hi Bob,
I am working to post the Motherboard schematics. We may need an NDA or something for the PRO schematics, I will get back to you on that as soon as possible. Sorry for the delay.
-Mike
- Is it possible to get the schematics posted for these boards? As a minimum I would like to get the pin-out for the DSP and the FPGA on the MityDSP-Pro. The motherboard schematics would also be helpful - we're building our application on ...