Mity CPU Platforms » MitySOM-335x (ARM Cortex-A8 Based Products)

10/21/2014

JC 10:28 AM Software Development: RE: Communicating with an 8-bit parallel interface (GPIO, SPI or GPMC)

SPI:
I'm not sure what you mean by using the spi bus to handle the 8-bit data bus.
If you want raw access to the spi device then you need to modify the baseboard file. The 3.2 kernel we are using doesn't use device tree, instead the... Jonathan Cormier

JC 10:16 AM Software Development: RE: Communicating with an 8-bit parallel interface (GPIO, SPI or GPMC)

As Alex mentioned the GPMC bus is used for an on-SOM nand memory. The GPMC bus allows multiple devices to use the bus as long as they only communicate when their chip select is high. Does your device have someway to ignore communicatio... Jonathan Cormier

10/20/2014

AB 04:55 PM Software Development: Communicating with an 8-bit parallel interface (GPIO, SPI or GPMC)

Posting this on behalf of a customer:
The interface to their networking chip and other peripheral boards on their current motherboard is through memory mapped I/O. The customer would like to recreate this with the MitySOM-335x and is ... Alexander Block

10/01/2014

MK 02:31 AM PCB Development: RE: Spurious Reboot Debug

Yes. Where do I send it?
Michael Karasoff