Mity CPU Platforms » MityDSP-L138 (ARM9 Based Platforms)

07/24/2024

FW 02:31 PM Software Development: RE: Serial port 2 issue, RS485, RTS drops to early

I figure it's about 10% of the CPU when operating 1200 baud and 1 response per second; it gets much lower as you approach 9600 baud (1.3%). This also takes into account the modulo 16 fifo calc assuming random packet lengths. All in all, ... Fred Weiser

07/22/2024

JC 07:21 PM Software Development: RE: Serial port 2 issue, RS485, RTS drops to early

> before shutting off the 485 driver
Any idea how often the shutting down occurs? Jonathan Cormier

FW 07:19 PM Software Development: RE: Serial port 2 issue, RS485, RTS drops to early

I patched the 8250.c file to increase the 10ms timeout. I found the timeout is really there only to assure the uart tx fifo drains completely before shutting off the 485 driver - as such, it will never be more than about 16 characters. I... Fred Weiser

07/19/2024

DL 06:14 PM PCB Development: RE: MityDSP-L138F Block Diagram Inconsistencies

Dan,
That clears things up perfectly. Thank you for a quick and comprehensive response. Dylan Louviaux

DV 06:10 PM PCB Development: RE: MityDSP-L138F Block Diagram Inconsistencies

Hi Dylan,
The external input to the Boot Config Block is the EXT_BOOT# signal pin bin 12 of the SO-DIMM connector. The Boot Config Block on the SOM uses the value of EXT_BOOT# to set the boot strap resistors for the L138. The two opti... Daniel Vincelette

DL 04:06 PM PCB Development: MityDSP-L138F Block Diagram Inconsistencies

All,
I am designing a carrier board for the MityDSP-L138F with A7 FPGA. I have noticed some inconsistencies with the block diagrams in the documentation (https://www.criticallink.com/wp-content/uploads/2014/01/MityDSP-L138F_Spec.pdf).
... Dylan Louviaux

07/03/2024

JC 02:19 PM Software Development: RE: MityDSP-L138 Power Draw in Deep Sleep? Waking ARM core from DSP core? Power and Sleep Controller (PSC)

Michael Bisbano wrote in message#6697:
> Hi Jonathan,
> ...
We have some posted power usage measurements for the module here: https://support.criticallink.com/redmine/projects/arm9-platforms/wiki/33V_Supply_Requirements
A max of 1W l... Jonathan Cormier

07/01/2024

MB 09:16 PM Software Development: RE: MityDSP-L138 Power Draw in Deep Sleep? Waking ARM core from DSP core? Power and Sleep Controller (PSC)

Hi Jonathan,
Thank you for the response, please let me know what you find out! The system as a whole must be under 1W average while operating, and very low <50mW when in sleep. When operating, it will be performing some audio signal pr... Michael B

JC 07:05 PM Software Development: RE: MityDSP-L138 Power Draw in Deep Sleep? Waking ARM core from DSP core? Power and Sleep Controller (PSC)

Michael Bisbano wrote:
> Hi all,
> ...
Hi Michael, I did a bunch of work for the MitySOM-335x for sleep mode but am not sure about the L138. I'll ask around and let you know what I find out.
>
> ...
In the meantime could you clarif... Jonathan Cormier

MB 06:34 PM Software Development: MityDSP-L138 Power Draw in Deep Sleep? Waking ARM core from DSP core? Power and Sleep Controller (PSC)

Hi all,
I was wondering if anyone had data on power draw for the MityDSP-L138 in deep sleep? My application is battery powered and we are determining if it is more feasible to have an external circuit on our custom baseboard control p... Michael B

JC 03:49 PM Software Development: RE: Serial port 2 issue, RS485, RTS drops to early

Fred Weiser wrote in message#6688:
> Changing the timer is probably not in my best interest; my project supports down to 1200 baud with packets up to 256 in length (that's over 2 seconds). I see two possibilities:
Can you try it just t... Jonathan Cormier