Mity CPU Platforms » MityDSP-L138 (ARM9 Based Platforms)

03/07/2024

JC 08:48 PM Software Development: RE: DSP FPGA EMIF GPIO Failure

Alright, let's simplify. The base module's register 0 contains some version info. You can read it 4 times in a row and then it will start repeating. For example on my board: Jonathan Cormier

03/06/2024

KB 12:50 AM Software Development: RE: DSP FPGA EMIF GPIO Failure

Thank you for answer.
I modified the part you mentioned and changed it to 0x66000080, but it still doesn't work.
today
https://support.criticallink.com/redmine/projects/arm9-platforms/wiki/DSP_Quick_Start
I've tried loading it al... Kyungguk Bok

03/05/2024

JC 05:05 PM Software Development: RE: DSP FPGA EMIF GPIO Failure

Kyungguk Bok wrote:
> hello.
> ...
Okay, so that should mean your fpga code is fine. Note its a good idea to make sure the fpga_gpio.ko kernel module isn't loaded if you are trying to control it from the DSP. They could fight each ot... Jonathan Cormier

03/04/2024

KB 09:29 AM Software Development: DSP FPGA EMIF GPIO Failure

hello.
I am having a problem controlling GPIO with MityDSP-L138F through DSP and FPGA EMIF communication, so I am leaving a question.
FPGA source
constant CORE_BASE_MODULE: integer := 0;
constant CORE_TS_MODULE : integer := 5;
... Kyungguk Bok