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From 07/30/2019 to 08/28/2019

08/28/2019

AP 12:49 PM Software Development: Loading and running PRU
Hi,
I'd like to load and run a simple PRU .out writing to shared RAM at my MityDSP-L138F
I found some old related thread "How to enable PRU Subsystem on MityDSP-L138F SOM ???" (https://support.criticallink.com/redmine/boards/10/topics...
Aviv Prital

08/19/2019

JC 02:00 PM Software Development: RE: Change data between ARM(Linux) - DSP (bare-metal)
Check out TI's CMEM.
> Note that you will probably have to invalidate caches when using shared memory. The CMEM ti kernel module can be used to reserve a chunk of memory and handle caching from linux user space. http://processors.wik...
Jonathan Cormier

08/18/2019

AP 11:54 AM Software Development: RE: Change data between ARM(Linux) - DSP (bare-metal)
Hi,
I've leveraged TI's quickStartOMAPL1x_rCSL project and implemented the DSP side code sharing memory at SHARED_CPU_VARS_MEM 0x8001FC00 (sharedCpuVars.h).
At the ARM side I run Linux user space utility that mmaps this shared memory, ...
Aviv Prital
 

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