Project

General

Profile

Activity

From 04/22/2018 to 05/21/2018

05/21/2018

JC 03:56 PM FPGA Development: RE: FPGA GPIO issue
Okay thanks Tom. I put that link in the wiki page to hopefully help people in the future. Jonathan Cormier

05/17/2018

TR 07:50 PM PCB Development: New Design Bringup Question
Hi, we have an Industrial I/O board with a Mity-L138F SOM and are bringing up a custom HW design that plugs into it's expansion I/O connectors. We have successfully done development with two evaluation boards that we have interfaced with... Tom Riddle

05/16/2018

TR 03:15 PM FPGA Development: RE: FPGA GPIO issue
Hi Jonathan,
Here's the link
https://support.criticallink.com/redmine/boards/12/topics/2224
It's been a few years since my last FPGA project, so I was a bit rusty. What I benefited from most was looking at that posted source ex...
Tom Riddle
JC 01:16 PM FPGA Development: RE: FPGA GPIO issue
Can you link to the post? It may help me update the wiki page. Jonathan Cormier
TR 12:05 AM FPGA Development: RE: FPGA GPIO issue
Hi Jonathan, thanks for the info... So I followed an example from a post a few years back (FPGA GPIO: toggle problem) and was able to get the GPIO going.
Regs, Tom
Tom Riddle

05/15/2018

JC 03:23 PM FPGA Development: RE: FPGA GPIO issue
The fpga can connect the gpio core to any pin you want. Gpio 144 should map to the first gpio core pin in the fpga image.
The .ucf file is used to map processor pins to net names in the vhdl.
MDK_2014-01-13/examples/industrial_io/...
Jonathan Cormier
TR 01:45 AM FPGA Development: FPGA GPIO issue
Hi,
I am attempting to get some FPGA GPIO control going with an L138/LX45 IndustrialIO board. Have been following these instructions
https://support.criticallink.com/redmine/projects/arm9-platforms/wiki/FPGA_Core_Device_Drivers
...
Tom Riddle
 

Also available in: Atom