Activity
From 03/15/2015 to 04/13/2015
03/26/2015
- JC 11:21 AM Software Development: RE: Pull-up Enable for MityDSP L138 (cp[0])
- To be more specific, @CP[0]@ covers the following pins: @GP0[8] (OMAP_GP0_8), GP0[9] (OMAP_GP0_9), AHCLKX (AUDIO_SYSCLK), AHCLKR (AUDIO_SYSCLK), AFSX (AUDIO_FRAME), GP0[13] (OMAP_GP0_13), ACLKX (AUDIO_CLK), GP0[15] (OMAP_GP0_15)@
* T...
03/25/2015
- CB 10:57 AM FPGA Development: RE: Mity L138F FPGA -> OMAP interrupt lines
- Hi Alex,
I was using MDK_2012-03-12 and in the included UCF the IO standard on those pin was different:
NET "o_nmi_n" LOC = "N8" | IOSTANDARD = LVCMOS33;
NET "o_int<0>" LOC = "K6" | IOSTANDARD = LVCMOS33;
NET "o_int<1>" LOC = "F2... - I'm trying to get a new hardware design up and running with the MityDSP L138, using the Industrial IO board as a starting point. I've noticed that in U-Boot, the enables set at DAVINCI_PUPD_ENA for groups 5, 8, 9 and 15 are set to 0 (di...
03/23/2015
- AB 05:08 PM FPGA Development: RE: Mity L138F FPGA -> OMAP interrupt lines
- Chris,
Hopefully you happened upon this on your own but the details for the pin-configuration, voltage standards, can be found in the sample .ucf files we provide in the MDK BSP (https://support.criticallink.com/redmine/projects/arm9-...