Activity
From 12/15/2014 to 01/13/2015
01/13/2015
- OM 04:30 PM Software Development: RE: u-boot problem
- Without the serial converter it works.
The board has come to life!
Thank !!! - JC 09:25 AM Software Development: RE: u-boot problem
- Could you verify that the BOOTME message is sent by the l138 when you power it while holding the boot button? The output above seems to indicate it timed out waiting for the BOOTME message.
Also are you using a usb to serial converter... - MW 09:21 AM Software Development: RE: u-boot problem
- You should not need to do that if you are getting past u-Boot and trying to boot the kernel.
If you are getting any boot text (getting to u-Boot) can you please do the following and capture the text from the console and post it:
1.... - OM 09:19 AM Software Development: RE: u-boot problem
- Unfortunately, does not help. The message of the utility is following:
D:\...\MityDSP\sfh_ubl_072111>sfh_OMAP-L138 -flash -v -p C
OM1 UBL_SPI_MEM.ais u-boot.bin
-----------------------------------------------------
TI Serial Fla... - JC 09:01 AM Software Development: RE: u-boot problem
- Does this help?
[[Reprogramming a Dead Board]] - OM 07:44 AM Software Development: RE: u-boot problem
- Hi Mike.
After manipulations in accord https://support.criticallink.com/redmine/projects/arm9-platforms/wiki/Programming_the_FPGA my board it is not loaded at all.
It is impossible to be connected to her with CCS. On Industrial IO De... - MW 07:09 AM Software Development: RE: u-boot problem
- Post the complete text and your u-Boot environment.
Typically, this message is because the kernel cannot locate a root filesystem to boot from. Do you have your rootfs environment variable set?
-Mike
- Hi,
After power on board MityDSP-L138F the download stops with the message " Kernel panic - not syncing: No init found. Try passing init = option to kernel."
How to correct this situation?
Thanks
01/12/2015
- OM 05:48 AM FPGA Development: RE: FPGA programming
- Thank for your reply Mike.
Is it possible to write an image FPGA through СОМ1 on MityDSP? Whether it is possible to make it under Windows?
Oleh
01/10/2015
- MW 09:17 AM FPGA Development: RE: FPGA programming
- Once you have a bit file that you like you can run the promgen tool to create the binary image to load per this wiki page:
https://support.criticallink.com/redmine/projects/arm9-platforms/wiki/FPGA_Overview
Once you have a binary i... - Hi,
I have board L138-FI-236-RL.
Developed in Xilinx ISE the design fine works on FPGA at use ISE iMPACT.
Please, tell a step-by-step how to create an image for FPGA and how to provide working of the design at power off/power on.
...
01/09/2015
- SN 05:48 AM Software Development: RE: Simple Code/Doc for FPGA toggle of GPIO from DSP
- Thank you, you where spot, it solved the issue with only having one pin high at a time.
The following works
mpGpio->SetPinValue(0,0,1); //pin7
mpGpio->SetPinValue(0,1,1); //pin15
if i use
mpGpio->WritePins(0,0xFFFF,1); //al...
01/08/2015
- MW 09:18 AM Software Development: RE: Simple Code/Doc for FPGA toggle of GPIO from DSP
- Also, you should not be calling the destructor. This line is not OK:
- MW 08:29 AM Software Development: RE: Simple Code/Doc for FPGA toggle of GPIO from DSP
- The driver could be rewritten to contain a shadow mask of the desired output register, but that is not the current implementation.
-Mike
- MW 08:28 AM Software Development: RE: Simple Code/Doc for FPGA toggle of GPIO from DSP
- The code for the DSP GPIO control does a read modify write. It Reads the input state of the entire bank, masks the value you are trying to change into the register, and writes the register back out.
If, in your VHDL, you do not conne... - SN 08:04 AM Software Development: RE: Simple Code/Doc for FPGA toggle of GPIO from DSP
- Not sure what you mean with input ?,
both are mapped in the VHDL code as output. and set as output with SetPinDirection()
I can set both pin high, only not at the same time. - MW 07:52 AM Software Development: RE: Simple Code/Doc for FPGA toggle of GPIO from DSP
- Do you have the inputs of the GPIO core for offsets 0 and 1 connected in you FPGA design?
- SN 04:22 AM Software Development: RE: Simple Code/Doc for FPGA toggle of GPIO from DSP
- Hi
If i want to toggle both pin 7 and pin 15 at the same time i have an issue (both work independently). Pin 7 goes high, but as soon an i write to pin 15 it goes low again. I tried with mpGpio->WritePins(0,0x3,1)/mpGpio->WritePins(0,... - Hi All,
I try to figure out how to serve an interrupt in the DSP code and how to register an ISR for a FPGA interrupt.
How can I register an interrupt system in the DSP code (interrupt from FPGA --> execute ISR)? Could anyone provide...
01/05/2015
- FA 07:08 PM FPGA Development: RE: Programming the FPGA
- Hi
What was the solution to the last problem (add source error)? I get the same warning when trying to add pwm.ngc etc into a lx45 project.
thanks, Flemming
12/23/2014
- Hi im trying to toggle a pin in the FPGA(busy/awake LED would do for now) from the DSP. Is there a doc(howto) describing the order of configuration/initialization and usage?.
Been looking at files from MDK_2014-01-13\sw\DSP\lib\core a...
12/22/2014
- OM 06:27 AM Software Development: RE: DSP/BIOS issue MityDSP-L138
- Thank Alex for your answer.
I think a problem was in incorrect PINMUX for UART-1.
My design works fine for UART-0 and UART-2.
Best regards,
Oleh
12/18/2014
- AB 10:41 PM Software Development: RE: DSP/BIOS issue MityDSP-L138
- Oleh,
Can you please share some more details about this issue if it is still occurring?
It looks to me like Uboot is interpreting the file as text and trying to execute the commands.
Presumably the DSP has not taken control of t...