Activity
From 09/23/2014 to 10/22/2014
10/22/2014
- Please can you provide information for D1 and D2 LEDs on the L138-FX-225-RC module. What are they connected to?
Thanks,
Anton - We are using the L138-FX-225-RC on a new custom baseboard and are having trouble with boot:
- no UART activity in normal SPI boot
- UART boot mode sends "BOOTME"
We attempted to erase and flash the bootloader using the WinCE boot pa...
09/26/2014
- MA 02:27 AM Software Development: RE: GP0[4] state on boot for L138F
- ??How quickly do you need it to be low? You might put an external pull down on your board.??
Pretty much instantly would be ideal as we use it as a /SHUTDOWN control for some hardware that should only be brought up once the Mity is fu...
09/25/2014
- MW 07:46 PM Software Development: RE: GP0[4] state on boot for L138F
- How quickly do you need it to be low? You might put an external pull down on your board.
You could disable the pull up, but keep in mind the OMAP-L138 controls for the pull up are in groups, so you will affect other pins when you dis... - MA 05:11 PM Software Development: RE: GP0[4] state on boot for L138F
- Hi Mike, thanks for the explanation. As we need this pin to be low on power-up, would the best place to set this be in the U-Boot mityomap config/init code?
- MW 03:40 PM Software Development: RE: GP0[4] state on boot for L138F
- Hi,
If you check the OMAP-L138 datasheet (it's a bit convolved) Table 2-29, the GP0[4] pin pullup state is defined by CP[2] group control in the PUPDENA / PUPDSEL registers after reset completes (during reset it should be pulled down)... - Hi, we noticed that the power on state of GPIO_0_4 is that it is driven high. I am a little confused about this since I can't see anything in the U-Boot source code (u-boot-mitydspl138/board/davinci/mityomapl138/) changing PINMUX1 from t...
09/23/2014
- SB 02:05 PM Software Development: RE: UPP problem
- Problem was caused by cache incoherency. Use of BCACHE_inv() fixed it.