Activity
From 05/01/2014 to 05/30/2014
05/30/2014
- MW 11:02 AM Software Development: RE: Kernel loading module problems MityDSP and FPGA configuration
- Did you also rebuild the FPGA drivers? They are not in-tree in the kernel git repository. They are located in the board support package in the MityDSP Developer's Kit.
Let's start with this:
On the build machine: - SB 10:40 AM Software Development: RE: Kernel loading module problems MityDSP and FPGA configuration
- Dear Michael,
let me know if my way of working is right:
1) I wrote my own baseboard-industrialio.c file as reported in the firts post of this discussion.
2) I recompiled the kernel as reported in https://support.criticallink.com/re... - MW 07:30 AM Software Development: RE: Kernel loading module problems MityDSP and FPGA configuration
- Hello,
We have many customers able to load and run modules with the MityDSP-L138, it's not obvious what the issue is here. I am suspicious that there may have been a problem with the filesystem installation / update (either the modul... - SB 04:00 AM Software Development: RE: Kernel loading module problems MityDSP and FPGA configuration
- Dear all,
attached you can find a text (LinuxLoading.txt) file where I captured the entire boot together with the screenshot where "Failed" occurs (FailuresLoadingKernel.png).
I also run "uname -a" and the results are in the text fil... - AS 03:45 AM Software Development: RE: How to run bin application via u-boot?
- Michael Williamson wrote:
> Just to confirm, you have the compiler option "--symdebug:none" in your release compile and link options?
> ...
Thanks Mike.
Unfortunately I didn't check this compiler option and now It's my weekend so I'll...
05/29/2014
- AB 04:29 PM Software Development: RE: How to run bin application via u-boot?
- Ahmed,
I believe Mike was suggesting that you build the application as a "release" version without any debugging and see what the resulting application file size is?
I.E. if it was 5MB in debug maybe it's 2MB in release, thus no ne... - MW 04:04 PM Software Development: RE: How to run bin application via u-boot?
- Just to confirm, you have the compiler option "--symdebug:none" in your release compile and link options?
-Mike
- AS 03:51 PM Software Development: RE: How to run bin application via u-boot?
- Hi Mike,
I have tried what you mentioned and it didn't work.
I'll wait your trial.
Thanks in advance. - MW 03:02 PM Software Development: RE: How to run bin application via u-boot?
- I think you need to strip the .out file (make a release version that removes the debugging information).
If I get a second I will try it out.
-Mike
- AB 01:48 PM Software Development: RE: How to run bin application via u-boot?
- Posting some previous direct followup e-mails from the customer.
I have followed the steps of the Starterware wiki ([[https://support.criticallink.com/redmine/projects/arm9-platforms/wiki/StarterWare]]) and I could run elf (UART_MITY_... - MW 10:47 AM Software Development: RE: Kernel loading module problems MityDSP and FPGA configuration
- Hi,
Can you please capture the entire boot up on the console to a text file and set it over?
Or at least run "uname -a" and report the results?
-Mike
- SB 10:38 AM Software Development: RE: Kernel loading module problems MityDSP and FPGA configuration
- Dear Bob,
when I try to load the modules with "insmod fpga_ctrl.ko" I get an error with "Function non implemented" as explanation.
I also found on internet that the insmod error message is caused by either a kernel lacking module sup... - BD 09:30 AM Software Development: RE: Kernel loading module problems MityDSP and FPGA configuration
- Hi Silvano,
Jon was referring to the kernel modules explicitly. The modules need to be installed in your target root filesystem (/lib/$kernelversion) after you copy over the kernel.
The page you reviewed, does mention this, but it'... - SB 08:47 AM Software Development: RE: Kernel loading module problems MityDSP and FPGA configuration
- I report before that I recompile the kernel every time I made a modificatuon on the baseboard file.
In fact the link you report me is cited by me in my first message.
Maybe there is something wrong in the file or in the compiling.
Cou... - JC 08:24 AM Software Development: RE: Kernel loading module problems MityDSP and FPGA configuration
- Its hard to tell from those error messages whats going on but have you tried recompiling the kernel modules when you made changes to the kernel?
See https://support.criticallink.com/redmine/projects/arm9-platforms/wiki/FPGA_Core_Devic... - Hello everybody.
I am Silvano Bertoldo, I mainly work on the software side of MityDSP and I have a big problem about the linux kernel I am not able to solve. I am very grateful if you can support me or forward the present email to a s... - JC 09:53 AM Software Development: RE: Compiler does not run in VM
- Also our vm does come with the toolchain installed. I'm unsure why you were unable to locate it.
Try looking in /usr/local/oecore-i686
The instructions seem to be missing that you need to run @. /usr/local/oecore-i686/environment-s... - MW 09:29 AM Software Development: RE: Compiler does not run in VM
- Yes. You need to run the 32-bit version in the VM if your VM is a 32-bit architecture.
on your VM type "uname -a". It should tell you the version of the VM architecture.
-Mike - Hello- I'm new to the MityDSP platform and I am having trouble getting the development environment working. I have imported the VM into VirtualBox, and can run the VM. I'm trying to get the environment going for the L138F (ARM9). I fo...
05/28/2014
- Hi everyone,i have MityARM1808F.
I could use "bootelf" command[ex: bootelf 0xc0700000] to run any app.out,but the size of .out format is usually large(in my case is about 5 Mega byte which is too large to be saved on SPI flash with FPGA... - AS 08:54 AM Software Development: RE: UPP ISR is not called
- Finally i could solve this issue by adding the following code :
asm(" mrc p15, #0, r0, c1, c0, #0\n\t"
" orr r0, r0, #0x00002000\n\t"
" mcr p15, #0, r0, c1, c0, #0\n\t");
before calling BIOS_start function.
...
05/19/2014
- AS 04:43 PM FPGA Development: RE: Programming FPGA Flash using IMPACT
- Thanks Michael,
I shall follow the steps in the link you mentioned and let you know results.
05/17/2014
- RK 12:45 PM Software Development: RE: DSP- EDMA Transmission problem
- Hello again,
I am now trying to transmit data using upp interface. On the FPGA- side the interface works correctly, but on the DSP- side I cannot receive data, that is, My message queue wouldn't wake. I did the following in my DSP/BIOS ...
05/16/2014
- MW 05:55 PM Software Development: RE: EMIF Clock in U-Boot
- Hello,
I assume you mean the EMIFA clock (to FPGA) not the EMIF clock (used for the DDR).
I am sorry I missed this. I believe the EMIF clock gets initialized in the User Boot Loader (the UBL), a copy of which is included in the bo...
05/15/2014
- MW 08:36 PM FPGA Development: RE: Programming FPGA Flash using IMPACT
- Hi,
Please take a look at the [[Programming the FPGA]] wiki page for information about programming the FPGA.
The FPGA can be programmed via JTAG or via 8 bit parallel slave select mode through the OMAP-L138 (or AM18XX) EMIFA databu...
05/14/2014
- Hi everyone,
I'am using CCS V5.3 and emulator XDS100V2.
I have developed SYS/BIOS ARM app. which use UPP to send/receive data to/from FGPA. Everything works fine(an interrupt is received when data has been sent/received to/from FP...
05/12/2014
- MW 11:44 AM PCB Development: RE: uPP Interface
- I don't think that the UPP pins are pinmuxed (there is only one option if the UPP is used). See the MDK/sw/dsp/core/tcDspUpp.cpp for pinmux setting.
-Mike - OM 09:16 AM PCB Development: RE: uPP Interface
- Thanks Mike for reply.
The question will be, to what pins DSP connected pins FPGA? It needs to be known for purposes PINMUX.
Oleh - MW 07:08 AM PCB Development: RE: uPP Interface
- The UCF file in the board support package at MDK/fpga/vhdl/MityDSP_L138.ucf includes connection information between the UPP interface pins and the FPGA.
This is an excerpt: - Hi,
How to find out as are connected pins FPGA and DSP for the interface uPP?
Kind Regards,
Oleh
05/11/2014
- AS 01:03 PM FPGA Development: RE: UPP Sample Code needed
- Thanks for you.That really helps.
- Hello everyone, i have a MityARM-1808F with 256-Mb NAND Flash.
1 - I need to know the steps to Program FPGA Flash (NAND Flash as I think) using IMPACT (because I don't use Linux in my App. on ARM).
2 - what is NAND Flash Type ?
Th...
05/09/2014
- DR 10:24 AM Software Development: RE: DSP DMA crashes Linux
- I have recently been working on a project where we ran into conflicts between QDMA's on the DSP side and MMC use on the ARM side. After much wandering around in the source code, it appears that the ARM code doing DMA for the MMC is usin...
05/08/2014
- MW 08:39 AM PCB Development: RE: 3D Step (STP) Files
- Hi,
Please check this "wiki page":https://support.criticallink.com/redmine/projects/arm9-platforms/wiki/CAD_Files and let me know if it does not provide what you need.
-Mike
- Hi There,
Would it be possible to make available a 3D STP file of the MityDSP L138F
processor module for mechanical assembly design/modelling purposes?
Kind Regards,
Steven.
05/02/2014
- MW 03:53 PM Software Development: RE: DspFpgaGpio.cpp: i f (Bank > mnNumBanks) return -1
- Hi John,
You are correct. We've pulled in this fix and it will get published in the next release for the MityDSP-L138 BSP.
Thanks for the bug report.
-Mike - FYI.
In tcDspFpgaGpio::ConfigurePin(unsigned int Bank, unsigned int Offset, etc.) and a few other fctns in DspFpgaGpio.cpp, there's a test for a valid value for the Bank arg and for the Offset arg, like: