Activity
From 04/23/2014 to 05/22/2014
05/19/2014
- AS 04:43 PM FPGA Development: RE: Programming FPGA Flash using IMPACT
- Thanks Michael,
I shall follow the steps in the link you mentioned and let you know results.
05/17/2014
- RK 12:45 PM Software Development: RE: DSP- EDMA Transmission problem
- Hello again,
I am now trying to transmit data using upp interface. On the FPGA- side the interface works correctly, but on the DSP- side I cannot receive data, that is, My message queue wouldn't wake. I did the following in my DSP/BIOS ...
05/16/2014
- MW 05:55 PM Software Development: RE: EMIF Clock in U-Boot
- Hello,
I assume you mean the EMIFA clock (to FPGA) not the EMIF clock (used for the DDR).
I am sorry I missed this. I believe the EMIF clock gets initialized in the User Boot Loader (the UBL), a copy of which is included in the bo...
05/15/2014
- MW 08:36 PM FPGA Development: RE: Programming FPGA Flash using IMPACT
- Hi,
Please take a look at the [[Programming the FPGA]] wiki page for information about programming the FPGA.
The FPGA can be programmed via JTAG or via 8 bit parallel slave select mode through the OMAP-L138 (or AM18XX) EMIFA databu...
05/14/2014
- Hi everyone,
I'am using CCS V5.3 and emulator XDS100V2.
I have developed SYS/BIOS ARM app. which use UPP to send/receive data to/from FGPA. Everything works fine(an interrupt is received when data has been sent/received to/from FP...
05/12/2014
- MW 11:44 AM PCB Development: RE: uPP Interface
- I don't think that the UPP pins are pinmuxed (there is only one option if the UPP is used). See the MDK/sw/dsp/core/tcDspUpp.cpp for pinmux setting.
-Mike - OM 09:16 AM PCB Development: RE: uPP Interface
- Thanks Mike for reply.
The question will be, to what pins DSP connected pins FPGA? It needs to be known for purposes PINMUX.
Oleh - MW 07:08 AM PCB Development: RE: uPP Interface
- The UCF file in the board support package at MDK/fpga/vhdl/MityDSP_L138.ucf includes connection information between the UPP interface pins and the FPGA.
This is an excerpt: - Hi,
How to find out as are connected pins FPGA and DSP for the interface uPP?
Kind Regards,
Oleh
05/11/2014
- AS 01:03 PM FPGA Development: RE: UPP Sample Code needed
- Thanks for you.That really helps.
- Hello everyone, i have a MityARM-1808F with 256-Mb NAND Flash.
1 - I need to know the steps to Program FPGA Flash (NAND Flash as I think) using IMPACT (because I don't use Linux in my App. on ARM).
2 - what is NAND Flash Type ?
Th...
05/09/2014
- DR 10:24 AM Software Development: RE: DSP DMA crashes Linux
- I have recently been working on a project where we ran into conflicts between QDMA's on the DSP side and MMC use on the ARM side. After much wandering around in the source code, it appears that the ARM code doing DMA for the MMC is usin...
05/08/2014
- MW 08:39 AM PCB Development: RE: 3D Step (STP) Files
- Hi,
Please check this "wiki page":https://support.criticallink.com/redmine/projects/arm9-platforms/wiki/CAD_Files and let me know if it does not provide what you need.
-Mike
- Hi There,
Would it be possible to make available a 3D STP file of the MityDSP L138F
processor module for mechanical assembly design/modelling purposes?
Kind Regards,
Steven.
05/02/2014
- MW 03:53 PM Software Development: RE: DspFpgaGpio.cpp: i f (Bank > mnNumBanks) return -1
- Hi John,
You are correct. We've pulled in this fix and it will get published in the next release for the MityDSP-L138 BSP.
Thanks for the bug report.
-Mike - FYI.
In tcDspFpgaGpio::ConfigurePin(unsigned int Bank, unsigned int Offset, etc.) and a few other fctns in DspFpgaGpio.cpp, there's a test for a valid value for the Bank arg and for the Offset arg, like:
04/27/2014
- AI 12:45 PM FPGA Development: RE: Programming the FPGA
Or, you can simply try this (It has been checked on L138F and slx45, just remove -b option):
http://www.xilinx.com/support/answers/35686.htm
BIN by bitgen is a non-byte-swapped file, the Sync Wordis read as "AA 99 55 66".
In ol...