Activity
From 01/22/2014 to 02/20/2014
02/19/2014
- MP 08:15 AM Software Development: RE: Why is MityDSP-L138F UPP transmit sometimes giving UOR events
- We leave it at 300 Mhz
- MW 08:08 AM Software Development: RE: Why is MityDSP-L138F UPP transmit sometimes giving UOR events
- When you boot linux, are you changing the CPU OPP to 456 MHz or leaving it at 300 MHz?
- MP 08:03 AM Software Development: RE: Why is MityDSP-L138F UPP transmit sometimes giving UOR events
- Hello,
Yes we have adjusted the bus master priority of uPP, but did not see any great improvements (strangely).
We have tried to set the uPP clock div to 1 (so 37.5 MHz) and the errors were flying. - MW 07:42 AM Software Development: RE: Why is MityDSP-L138F UPP transmit sometimes giving UOR events
- Did you check / adjust your UPP Bus master priorities?
- MP 07:33 AM Software Development: RE: Why is MityDSP-L138F UPP transmit sometimes giving UOR events
- Hello,
Just a quick update. When we do not boot into linux (just uboot) we do not see
these errors.
So booting linux has somehow influence on the uPP performence.
Again thanks for any assistants in this matter
02/18/2014
- GG 08:50 AM Software Development: RE: Why is MityDSP-L138F UPP transmit sometimes giving UOR events
- Hi Marc,
Here are a couple of other things to consider:
# In the past we've had throughput problems with TI's uPP drivers. That was a couple years ago, so maybe the drivers are improved or will work fine for your scenario. However... - MW 08:22 AM Software Development: RE: Why is MityDSP-L138F UPP transmit sometimes giving UOR events
- You might raise the priority up a bit (try 0 or 1). If the transfers are small, then it should be OK to give it priority.
-Mike
- MP 08:04 AM Software Development: RE: Why is MityDSP-L138F UPP transmit sometimes giving UOR events
- Hello,
Here are some answers to the questions:
* Are you trying to run continuous transfers?
- We do not run continuous but every 200 us (5 kHz)
* Do you get the error on every transmit, or periodically?
- No not every... - MW 07:17 AM Software Development: RE: Why is MityDSP-L138F UPP transmit sometimes giving UOR events
- Hi Marc,
Are you trying to run continuous transfers?
At 75 Mhz, you should be running a buffer rep rate of 64 / 75 MHz = 850 ns.
If you are trying to run continuous transfers, that would imply an interrupt rep-rate that fast.
... - MP 02:55 AM Software Development: RE: Why is MityDSP-L138F UPP transmit sometimes giving UOR events
- Hello,
Here are some answers to the questions:
* Are you using the Critical Link MDK drivers? If so, what version of the MDK are you using?
- We use TI's legacy uPP driver
- MDK_2013-05-15
* What is the CPU speed set t... - MW 07:22 AM Software Development: RE: I2C Bus
- Hi Bruce,
I believe that the I2C addresses for I2C0 are described in the "Carrier Board Design Guide":http://www.criticallink.com/wp-content/uploads/2014/01/MityDSP-L138-Carrier-Board-Design-Guide.pdf.
From section 3.3.8:
_All m... - We are currently investigating a problem accessing the I2C0 bus.
My initial enquiry is to find out what devices are on the MityDSP SOM to insure we are not conflicting.
Our SOM is a L138-DX-225-RI. We are using uBoot to boot t...
02/17/2014
- GG 09:25 AM Software Development: RE: Why is MityDSP-L138F UPP transmit sometimes giving UOR events
- Hi Marc,
If you are following the uPP design guidelines, then perhaps this is a true underflow or overflow condition. I have a number of questions about your project that can hopefully help us narrow down what the cause might be:
... - Hello,
We use the MityDSP-L138F and between DSP and FPGA we use UPP communication but transmit (channel A) is giving sometimes an UOR events.
What could be the cause of this error, we use the recommended clock source (PLL0_SYSCLK2) s...
02/10/2014
- BD 02:57 PM Software Development: RE: "Using TI C64x+ IMGLIB on OMAPL138F"
- Hello Naveen,
As you stated, the vision_framework demo uses the IMG_sobel_3x3_16(), which you can use to understand exactly how the IMG_sobel_3x3_16() function is called (look in file AlgorithmEdgeDetect.cpp).
Regarding the DATA_A... - MF 09:20 AM Software Development: RE: How to reserve EDMA for DSP
- I tried modifying device-da8xx.c as describe above, but the boot process hung. Here's the relevant part of the log:
02/06/2014
- JC 03:21 PM Software Development: RE: How to reserve EDMA for DSP
- Mary,
I think you can disable the dma usage of the spi driver. I am using the following resource declaration for a different project. Note that the dm365 is a cousin of the l138. - MF 11:03 AM Software Development: RE: How to reserve EDMA for DSP
- In researching this I found what looks like a similar problem:
http://e2e.ti.com/support/dsp/omap_applications_processors/f/42/t/308987.aspx
This discussion describes how the McBSP freezes when other EMDA accesses occur. I also no... - I am attempting to run this command to compile the kernel:
bitbake virtual/bootloader
And get the following error:
ERROR: Execution of event handler 'external_linaro_toolchain_version_handler' failed
Traceback (most recent call ...
02/05/2014
- Hi All,
I can see here (http://support.criticallink.com/rm_embedded/dsp-products/MDK_DOCS/2.11/core/class_mity_d_s_p_1_1tc_dsp_i2c2.html) that there is support for I2C-SMBus. However, in MDK_2013-05-15, I couldn't find the header core... - AS 11:01 AM Software Development: RE: Latest stable linux build for MityARM-1808/F
- Thanks Mike,
That did the works for me.
Cheers,
Angelos - PS 06:49 AM Software Development: RE: USB-OTG as a peripheral and a host
- Hello Jonathan and Mike,
Thank you for your quick replies.
@Mike
Thank you for your suggestion. I could use it as a file system, but I am interested in transmitting data in real time continuously. In such cases, I will not be able... - Hi,
We have received your Vision Development Kit from Digikey distributor this week. As per your VDK manual we interfaced the kit with mouse, camera and Monitor (with DVI-D input). We have followed the instructions given strictly, als...
02/04/2014
- JC 01:50 PM Software Development: RE: Accessing SPI1 bus
- Mary,
You can search the kernel source for the messages by using grep. For example I might search for the string "msb first" and look at what files are found containing that text. You could then comment out those print statements. - MF 01:18 PM Software Development: RE: Accessing SPI1 bus
- I have successfully added the SPIDEV support to the kernel and can communicate over the bus now.
I occasionally see messages on the console of the following form: - I am having an ARM/DSP conflict. The DSP is primarily reading data from the McBSP and transferring the data to a circular buffer in DDR memory which is shared with the ARM. The ARM accesses it through a pointer allocated with CMEM.
T... - MW 12:39 PM Software Development: RE: Latest stable linux build for MityARM-1808/F
- In the "file tab":https://support.criticallink.com/redmine/projects/arm9-platforms/files there are MDK downloads (.run files). Instructions for installation are "here":https://support.criticallink.com/redmine/projects/arm9-platforms/wik...
- Hi All,
Could you please tell me what is the Latest stable linux build for MityARM-1808/F? Could you also provide with a link to that?
I have seen that the latest ARM9 based platform is MDK_2013-05-15 but I couldn't find it.
Ki... - MW 08:53 AM Software Development: RE: USB-OTG as a peripheral and a host
- Probably the best solution would be to load in the USB OTG file storage gadget. This will make the L138 look like a thumb drive.
This link talks about it a bit (for AM335X, but is generally a "linux" thing and should work with L138).... - JC 08:33 AM Software Development: RE: USB-OTG as a peripheral and a host
- Unfortunately I don't have any experience with interfacing with Android phones. If your Android phone supports rndis this may be the best way to go.
- PS 05:14 AM Software Development: RE: USB-OTG as a peripheral and a host
- Hello,
I have used RNDIS and have been able to transfer data.
However, I would also like to know how to use either the *USB host* port or the *OTG port* to transfer data without setting up RNDIS.
I am trying to send data from my bo...
02/03/2014
- Hi,
I need to set up multicast routing between two interfaces on the mity board running Angstrom linux 2.6.34
I recompiled the kernel with all multicasting options enabled, but "cat /proc/sys/net/ipv4/conf/all/mc_forwarding" gives...
01/31/2014
- NK 05:14 AM Software Development: RE: "Regarding handling UART on MitydspL138F(OMAPL138)"
- Hi,
We are trying to interface Second UART (J504 as you mentioned) with Atmel AtXmega Controller so that upon receiving UART interrupts from it we need to enter in to the developed image processing functions.
Since we were told tha...
01/30/2014
- AB 02:22 PM Software Development: RE: "Regarding handling UART on MitydspL138F(OMAPL138)"
- Naveen,
The first UART is used for the debug/console port, UART1.
You would like to use the second UART in your DSP/ARM code to trigger some processing to occur correct? On the VDK this would be the J504 connector. I have verified ... - AB 01:17 PM Software Development: RE: "Reagrding spi NOR flash memory updating"
- Naveen,
I'm assuming that the question here is how would you get the updated Kernel from your host PC onto the MityDSP-L138 module to update the kernel in the NOR memory?
1) You are going to be executing the commands over the debug...
01/23/2014
- MC 06:18 AM Software Development: RE: Memcpy data transfer error from FPGA address space to CMEM-allocated data buffers.
- Hello Mike,
I've solved the problem! Actually it was a timing problem related to the access policy to the emif.
I eliminated the one-clock-delay due to the output flip-flop (reg_read), substituting it with a multiplexer.
Now it wor... - Hi Sir,
This is regarding editing the kernel in NOR flash memory, a detailed steps have been given in wiki for editing kernel but how to interface Mitydsp to host PC while flashing. Please help me in this regard.
Thanks in advance,...
01/22/2014
- MC 09:19 AM Software Development: RE: Memcpy data transfer error from FPGA address space to CMEM-allocated data buffers.
- Dear Mike,
When you say to configure the emif wait states etc., you mean modifying, for example, the file "u-boot-mitydspl138/board/davinci/mityomapl138/mityomapl138.c" ?
In that file I see these configurations:
code:
emif_r...