Activity
From 06/27/2013 to 07/26/2013
07/26/2013
- MW 11:33 AM Software Development: RE: Kernel bug
- Hi Mostafa,
Thank you for the notice.
I see that is in the master branch (2.6.34). We will correct it. However, it is not in the mitydsp-linux-v3.2 branch. You might consider upgrading to 3.2, most of our customers are using th... - Hi, just wanted to make you aware of a bug in the kernel sources:
http://support.criticallink.com/gitweb/?p=linux-davinci.git;a=blob;f=drivers/usb/gadget/epautoconf.c
lines 268 - 285 have been duplicated in lines 286 - 302.
-Mos...
07/24/2013
- MW 06:13 PM Software Development: RE: UPP "start" signal ignored in receive mode?
- Hi Stu,
Have you tried to use chipscope to confirm the alignment of the start strobe with the data as sent by the FPGA and check the UPP bus interface WAIT pins, etc? (if you don't have a license, I think you can get a 30 day trial on... - SC 12:53 PM Software Development: RE: UPP "start" signal ignored in receive mode?
- Scott,
Yes, we're trying to send one line (of 6176 bytes) per DMA memory buffer (also 6176 bytes). The "DspUpp.c" code seems to correctly handle setting up a "pending" DMA transaction behind the currently executing DMA transaction. ...
07/23/2013
- MW 05:52 PM Software Development: RE: UPP "start" signal ignored in receive mode?
- Hi Stu,
Check section 33.2.5.3 of the TRM. For receive mode, the start line is optional, controlled by the STARTx bit in UPICR.
The configuration of the strt signals are setup by the tsDspUppConfig in DspUpp.h and DspUpp.cpp. Che... - SW 04:56 PM Software Development: RE: UPP "start" signal ignored in receive mode?
- Stu,
I'm not sure about the DSP driver for uPP, I am using a Linux driver to the Arm. Are you trying to stream data from the FPGA to the DSP? Are you just using 1 line and therefore 1 memory buffer to transfer data via the uPP driver?...
07/22/2013
- MA 03:52 PM FPGA Development: RE: EMA_WAIT and bus contention on L138F
- Hi Mike, relevant definitions from the header:
- MW 02:11 PM FPGA Development: RE: EMA_WAIT and bus contention on L138F
- Just for sanity,
Have you confirmed you are writing to the correct AEMIF registers? CE3 is the NAND, and you are hitting "AEMIF_A3CR" in the above. I get a little confused about the register numbering vs. the CS numbering. Just wan... - MA 01:42 PM FPGA Development: RE: EMA_WAIT and bus contention on L138F
- Hi Mike,
I've now also tried setting unused I/O to float and increasing both the TA and Read Hold to 4 cycles. I've verified the timing change with ChipScope but unfortunately it has had no effect on the JFFS2 warnings.
Attaching a... - We have an FPGA application for the MityDSP-138F board which transmits "packets" to the DSP through the UPP port. The packet consists of 16 bytes of header and 6160 bytes of signal data. The FPGA asserts the UPP "start" signal on the f...
- DG 01:25 AM Software Development: RE: Fail to mount Root FS from MicroSD card
- Ok, managed to fix the problem.
I have changed mityomapl138_mmc_get_ro() in board-mityomapl138.c to return(0) since MicroSD has no write protect pin.
07/21/2013
- DG 10:19 PM Software Development: RE: Fail to mount Root FS from MicroSD card
- Hello, Tim!
Comma makes no difference, I have tried.
I have got a little progress - I have changed bootargs as follows:
bootsd=mmcinfo; ext2load mmc 0:1 0xc0700000 /boot/uImage; run sdargs; bootm 0xc0700000
sdargs=setenv bootar... - TI 07:27 AM Software Development: RE: Fail to mount Root FS from MicroSD card
- Dmitry,
I believe yhou are missing a comma in your bootargs..
root=/dev/mmcblk0p1 rw rootwait
should be
root=/dev/mmcblk0p1 rw,rootwait
cheers
/Tim - Hello!
I am trying to mount Root FS from MicroSD card (ext2 formated).
Boot process fails with kernel panic.
My U-Boot environment:
bootargs=mem=96M console=ttyS1,115200n8 root=/dev/mtdblock0 rw rootwait
bootcmd=sf probe 0; sf rea...
07/18/2013
- SH 06:50 PM Software Development: RE: RS-485 problems
- Solved the problem myself - it turns out that either SER_RS485_RTS_ON_SEND or SER_RS485_RTS_AFTER_SEND must be defined for the toggle to work. The flag SER_RS485_RTS_BEFORE_SEND is not recognised by the compiler, and (1<<3) doesn't seem...
- SH 05:54 PM Software Development: RE: RS-485 problems
- OK, then it all makes sense. In spite of the way the connector is shown in the documentation I was assuming (never assume) that the pinout was the "normal" IDC connector pinout.
So we are left with the problem that the TX_ENB line (p... - MW 05:20 PM Software Development: RE: RS-485 problems
- Actually, I take that back. The pin out is illustrated in Figure 2 of the specification....
-Mike
- MW 05:13 PM Software Development: RE: RS-485 problems
- Ah,
I think I may see the problem. Those connectors are pinned (on our PCB) for use with a ribbon cable and a DB-9 IDC connector (like the one you are using for the console). So the pins are numbered 1-5 on 1 row and then 6-10 on th... - SH 05:08 PM Software Development: RE: RS-485 problems
- My board is 80-000268RI-2B, S/N 132541. I looked at the appropriate document on the page you referenced, and while it is not the same document I was originally looking at, the pins and connectors are the same.
- MW 04:59 PM Software Development: RE: RS-485 problems
- Hi Steven,
Let's make sure you are referencing the correct revision information for the board (it has been updated a few times since original publication).
Revision history and schematics for the Industrial I/O boards are available... - SH 04:07 PM Software Development: RE: RS-485 problems
I am looking at pins on J504, based on the Industrial IO Board rev C documentation
Curiously, only pins 1,2,3,4,5,9 and 10 have solder showing ... that does not fit with the documentation.
I see traces on the back of the board go...- SH 03:27 PM Software Development: RE: RS-485 problems
- OK, here is what I see:
mitydsp@mitydsp-VirtualBox:~/linux-davinci$ git branch
master
* mitydsp-linux-v3.2
mitydsp@mitydsp-VirtualBox:~/linux-davinci$ git log
commit f13cb8373517840670b06fafc1b381e934c5ac37
Author: Michael Will... - MW 03:24 PM Software Development: RE: RS-485 problems
- I am assuming it compiled OK.
Are you sure that the write() call is returning successfully? Can you send the full example, or modify the stand alone examples (in c) and try them?
Also, you should be able to just - JC 03:22 PM Software Development: RE: RS-485 problems
- Btw press q to escape @git log@.
- JC 03:21 PM Software Development: RE: RS-485 problems
- Steven,
Run the command @git branch@ to see which branch is selected. It should say mitydsp-linux-v3.2. When you run @git log@ you should see the UART2 change at the top.
-Jonathan - SH 03:18 PM Software Development: RE: RS-485 problems
- OK, I built the new kernel and flashed it to the MityDSP - now uname gives:
Linux mityomapl138 3.2.0+ #1 PREEMPT Thu Jul 18 11:44:18 PDT 2013 armv5tejl GNU/Linux
But, I am still not seeing any toggling of Tx lines or the TX_ENB lin... - SH 02:43 PM Software Development: RE: RS-485 problems
- Sorry - my mistake. I re-installed the toolchain and then realized that I had typed "CROSS-COMPILE" instead of "CROSS_COMPILE". Kernel generation seems to be working now.
It is necessary to have the incantations exactly correct! - SH 02:06 PM Software Development: RE: RS-485 problems
- I seem to have the same problems - here is the output from a new shell:
- MW 01:52 PM Software Development: RE: RS-485 problems
- You only use the HOST native CC, not the cross tools, to build the config file. It seems like you have a CC environment variable set and it's pointing to a native (x86) gcc.
Can you please launch a new shell and run the setup script?... - SH 01:41 PM Software Development: RE: RS-485 problems
- I'm getting errors when I try to build the kernel:
mitydsp@mitydsp-VirtualBox:~/linux-davinci$ make ARCH=arm CROSS-COMPILE=arm-angstrom-linux-gnueabi- uImage
scripts/kconfig/conf --silentoldconfig Kconfig
WRAP arch/arm/include/... - MW 11:26 AM Software Development: RE: RS-485 problems
- If you have our repository cloned already....
- SH 11:14 AM Software Development: RE: RS-485 problems
- A newbie question - How do I build this particular branch of the kernel?
- SH 10:34 AM Software Development: RE: RS-485 problems
- Thanks for your response. Here is what I get from uname:
Linux mityomapl138 3.2.0 #1 PREEMPT Wed May 15 09:16:03 EDT 2013 armv5tejl GNU/Linux
- MW 12:30 PM FPGA Development: RE: EMA_WAIT and bus contention on L138F
- One thought:
Is it possible the tri-state drive logic for the data lines off the FPGA is creating bus contention? Perhaps there is a bug in the EMIFA interface that is not parking/tri-stating the data lines soon enough after OE is de... - MA 12:24 PM FPGA Development: RE: EMA_WAIT and bus contention on L138F
- Hi Mike,
Thanks for the suggestions.
Not sure I understand what you mean by FPGA access bandwidth. It is being used to implement the frontend of a high speed wireless communication system so we are using the the bus pretty much con...
07/17/2013
- MW 09:17 PM Software Development: RE: RS-485 problems
- OK. I have added the patch to the mitydsp-linux-v3.2 branch. You should be able to at least see the Tx line toggle with your code.
If you can confirm you are getting normal output on the Tx lines, then we can tackle the TXE issue. ... - MW 08:55 PM Software Development: RE: RS-485 problems
- Hi Steven,
Sorry for the confusion. It's not a menuconfig item. There is a patch needed to enable the UART2 pin pinmuxes (it didn't appear to get ported to the 3.2 kernel).
I will post the patch (push it to the git mitydsp-linux... - SH 08:32 PM Software Development: RE: RS-485 problems
- How would anyone know this? I have looked at the config of the kernel I am using and you are correct, these pins are not mentioned in the .config file. I built the kernel based on the instructions in the wike, and there is nowhere the ...
- DG 07:05 PM Software Development: RE: RS-485 problems
- Hello,
Is is possible your kernel may not be setting up the ARM pin multiplexing for UART2? In your baseboard file [arch/arm/mach-davinci/baseboard-industrialio.c if your using the industrial IO build], you probably need something like: - SH 06:48 PM Software Development: RE: RS-485 problems
- I have attached the files defining the class and showing how I open the serial port. Then I just use standard write calls using termHandle.
- I am trying to get the RS-485 running on my Industrial I/O board with the L-138F. I'm using the example code in "send.c" posted in the forum thread "Write UART2 RS-485 API". Looking at the pins on J504 (6 = Tx, 1 = Tx_ENB) I am not see...
- MW 07:38 AM FPGA Development: RE: EMA_WAIT and bus contention on L138F
- Hello,
How much bandwidth are you using for the FPGA accesses? Have you looked with any sort of bus analyzer (perhaps in chip scope) to assess the access logic? If the WAIT pin is getting hit, the slowdown could also be the ECC logi...
07/16/2013
- We have a project which uses CS4 and CS5 to write and read data from a pair of FPGA FIFOs respectively. CS4 is used exclusively for writing while CS5 is used exclusively for reading. The config register settings are:
/* CS4 config...
07/15/2013
- SH 05:23 PM Software Development: RE: Simple example needed
- Thanks for the help. I decided to take a very simple approach and use mmap to access the FPGA, based on the mmap example. Instead of an interrupt, I will just poll - I don't really need the response speed of an interrupt.
07/14/2013
- MW 08:22 AM Software Development: RE: Simple example needed
- Answers to questions:
1. The reserved FPGA id's are in the file: $MDK/sw/common/fpga/core_ids.h. I would use core ID 255 and count down for additional ones.
2. Not really. Normally we suggest that you start (for the FPGA) with th...
07/12/2013
- SP 02:02 AM Software Development: RE: flash and boot utils
- Hi Mike,
I finally took the newest flash loader sources from TI (v2.40) and followed the wiki instructions (http://processors.wiki.ti.com/index.php/Rebuilding_the_Flash_and_Boot_Utils_Package)
At the end, I only had to change the DEV... - VG 01:58 AM Software Development: RE: shared memory in the DSP Helloworld example
- Thanks mike. That cleared my doubts.
07/11/2013
- SH 09:50 AM Software Development: RE: Simple example needed
- I just thought of another question. Not being familiar with linux, I am wondering what abstraction I might be able to hook into. My device is very simple: there are a number of offsets to which values must be written, and there is one ...
- SH 09:33 AM Software Development: RE: Simple example needed
- OK, I am probably going to have a lot of questions. To start with:
1. What IDs are available to use for my core?
2. Do you have a walk-through of creating and using a new core?
3. Is it correct to assume that if a new core is added th... - MW 07:44 AM Software Development: RE: Simple example needed
- Hi Steven,
My understanding is that you have your own FPGA IP and want to control it (including catching an interrupt) from a linux user space application. Linux (and most non-RT OS's) doesn't really provide a direct way to do this. ... - MW 07:12 AM Software Development: RE: shared memory in the DSP Helloworld example
- Hello Vinod,
The memory allocated is in the OMAP external DDR2 memory, and is actually in the DSPLINK POOL segment in the DSPBIOS/DSPLINK memory map. When you print out a pointer address in a linux user space allocation, you are prin... - hi,
Where does the memory allocated by GetBuffer() reside? Is it in the external RAM or OMAP's internal memory? For my application I just want to make sure that the memory allocated is from the external RAM.
I tried displaying the ad...
07/10/2013
- SP 07:16 AM Software Development: RE: flash and boot utils
- Hi Mike,
We are using the serial flash tool to replace the preprogrammed U-Boot with an own SysBios based loader application.
In order to minimize human interaction, we plan to control the Reset and Boot pins via RS232 control signals ... - MW 07:01 AM Software Development: RE: flash and boot utils
- Hello,
Are you using the serial flash tool instead of u-Boot to program application images?
Are you rebuilding the tool to add or alter functionality?
We weren't planning a near term migration of the tool, as we normally only us... - Hello,
I rebuilt the SPI serial flash tool (sfh_OMAP-L138.exe) from the MDK_2013_05_15 sources. Therefor I changed the cross compiler location (I’m working with Cygwin under windows) such as make finished without errors or warnings. B...
07/09/2013
- CB 10:46 AM Software Development: RE: MItyDSP L138-FI-236-RL Industrial IO Board 80-000268RI-2 rev. B, wont reset and no output on serial port.
- Hi,
I am using a nondescript USB to RS232 cable, dmesg tells me its a FTDI USB-RS232 cable, with a FT232RL onboard.
Chris. - TI 09:55 AM Software Development: RE: MItyDSP L138-FI-236-RL Industrial IO Board 80-000268RI-2 rev. B, wont reset and no output on serial port.
- Chris,
Glad to hear of your success... if you don't mind, can you detail your setup a bit. Are you using a USB serial adapter (if so which one) or a serial port on your PC motherboard or pci card?
It sounds like the serial port you are... - CB 09:50 AM Software Development: RE: MItyDSP L138-FI-236-RL Industrial IO Board 80-000268RI-2 rev. B, wont reset and no output on serial port.
- Hi,
I finally got it working by directly connecting the serial port to the board.
Thanks for the help,
Chris. - CB 09:15 AM Software Development: RE: MItyDSP L138-FI-236-RL Industrial IO Board 80-000268RI-2 rev. B, wont reset and no output on serial port.
- Hi,
Swapping up the cables sees to make no difference, and if I plug in my work PC into the supplied cross over cable I get an IP.
Thanks,
Chris.
07/08/2013
- JC 09:09 AM Software Development: RE: MItyDSP L138-FI-236-RL Industrial IO Board 80-000268RI-2 rev. B, wont reset and no output on serial port.
- Chris,
Have you tried to add another null modem adapter into the mix or a straight-thru cable just as a sanity check.
-Jonathan - CB 06:54 AM Software Development: RE: MItyDSP L138-FI-236-RL Industrial IO Board 80-000268RI-2 rev. B, wont reset and no output on serial port.
- Hi Bob,
I have been trying with both screen and putty.
Both seem to work fine when I loopback the tx and rx lines on the serial port.
Thanks,
Chris.
07/07/2013
- BD 09:47 PM Software Development: RE: MItyDSP L138-FI-236-RL Industrial IO Board 80-000268RI-2 rev. B, wont reset and no output on serial port.
- Hello Christopher,
What terminal program are you using to connect to the serial port on your PC?
-Bob
07/05/2013
- I am trying to load the hello world program.
So I set up the serial port on my pc with the following settings:
Baud Rate = 115200
Data = 8 bit
Parity = none
Stop = 1 bit
Flow Control = none
I also connected the provided null...
07/02/2013
- SH 04:18 PM Software Development: RE: Simple example needed
- Yes, I'm looking for an example similar to the Hello World ARM/DSP project...
- MW 03:32 PM Software Development: RE: Simple example needed
- Is your ARM processor going to run linux?
- I am using the MityDSP L-138F Industrial development board. I am not finding the examples for that board given in the MDK_2013-05-15 very useful. Is there a simple project that would show the use of the FPGA GPIO core, for example, tha...
- MW 10:51 AM FPGA Development: RE: Hardware Reset
- On the MityDSP-L138F, RESET_IN pin is fed into a TPS3808G33DBVR reset monitor circuit. It is not connected to the FPGA or the OMAP-L138 directly. The output RESET of the TPS3808 is fed to the RESET pin on the OMAP-L138. The OMAP-L138 ...
- CL 10:06 AM FPGA Development: RE: Hardware Reset
- Hi Mike,
In effect yes. I was wondering if the device/circuit which drives the reset pin of the OMAP processor is also
connected to the FPGA and if yes, which pin.
Regards,
Steven.
07/01/2013
- MW 07:49 PM FPGA Development: RE: Hardware Reset
- When there is a power on reset, the FPGA will be re-initialized (the program pin is pulled low) and will require reprogramming.
Are you looking for an additional pin that may be used to reset just the FPGA?
-Mike
- Hi There,
Is there a pin on the MityDSP-L138F processor board FPGA which is attached to a
dedicated power-on/hardware reset source which can be used to initialise/reset registers?
Kind regards,
Steven Bremner.
06/28/2013
- CR 01:19 PM Software Development: RE: mtd->read (...) returned ECC error
- Hi Tim,
since today, the same problems as already mentioned are happening at the moment on my board.
Before I started with my development, I flashed the mityomap-base.jffs2 (MDK_2012-08-10) fs on the NAND. This works pretty well unti...
06/27/2013
- DT 04:56 AM Software Development: RE: Fail to boot the kernel after running setup.sh in DVSDK 4.03
- Hi Mike & Jonathan,
Really appreciate your help!
The kit could load the kernel now.
-Derek