Activity
From 06/15/2013 to 07/14/2013
07/14/2013
- MW 08:22 AM Software Development: RE: Simple example needed
- Answers to questions:
1. The reserved FPGA id's are in the file: $MDK/sw/common/fpga/core_ids.h. I would use core ID 255 and count down for additional ones.
2. Not really. Normally we suggest that you start (for the FPGA) with th...
07/12/2013
- SP 02:02 AM Software Development: RE: flash and boot utils
- Hi Mike,
I finally took the newest flash loader sources from TI (v2.40) and followed the wiki instructions (http://processors.wiki.ti.com/index.php/Rebuilding_the_Flash_and_Boot_Utils_Package)
At the end, I only had to change the DEV... - VG 01:58 AM Software Development: RE: shared memory in the DSP Helloworld example
- Thanks mike. That cleared my doubts.
07/11/2013
- SH 09:50 AM Software Development: RE: Simple example needed
- I just thought of another question. Not being familiar with linux, I am wondering what abstraction I might be able to hook into. My device is very simple: there are a number of offsets to which values must be written, and there is one ...
- SH 09:33 AM Software Development: RE: Simple example needed
- OK, I am probably going to have a lot of questions. To start with:
1. What IDs are available to use for my core?
2. Do you have a walk-through of creating and using a new core?
3. Is it correct to assume that if a new core is added th... - MW 07:44 AM Software Development: RE: Simple example needed
- Hi Steven,
My understanding is that you have your own FPGA IP and want to control it (including catching an interrupt) from a linux user space application. Linux (and most non-RT OS's) doesn't really provide a direct way to do this. ... - MW 07:12 AM Software Development: RE: shared memory in the DSP Helloworld example
- Hello Vinod,
The memory allocated is in the OMAP external DDR2 memory, and is actually in the DSPLINK POOL segment in the DSPBIOS/DSPLINK memory map. When you print out a pointer address in a linux user space allocation, you are prin... - hi,
Where does the memory allocated by GetBuffer() reside? Is it in the external RAM or OMAP's internal memory? For my application I just want to make sure that the memory allocated is from the external RAM.
I tried displaying the ad...
07/10/2013
- SP 07:16 AM Software Development: RE: flash and boot utils
- Hi Mike,
We are using the serial flash tool to replace the preprogrammed U-Boot with an own SysBios based loader application.
In order to minimize human interaction, we plan to control the Reset and Boot pins via RS232 control signals ... - MW 07:01 AM Software Development: RE: flash and boot utils
- Hello,
Are you using the serial flash tool instead of u-Boot to program application images?
Are you rebuilding the tool to add or alter functionality?
We weren't planning a near term migration of the tool, as we normally only us... - Hello,
I rebuilt the SPI serial flash tool (sfh_OMAP-L138.exe) from the MDK_2013_05_15 sources. Therefor I changed the cross compiler location (I’m working with Cygwin under windows) such as make finished without errors or warnings. B...
07/09/2013
- CB 10:46 AM Software Development: RE: MItyDSP L138-FI-236-RL Industrial IO Board 80-000268RI-2 rev. B, wont reset and no output on serial port.
- Hi,
I am using a nondescript USB to RS232 cable, dmesg tells me its a FTDI USB-RS232 cable, with a FT232RL onboard.
Chris. - TI 09:55 AM Software Development: RE: MItyDSP L138-FI-236-RL Industrial IO Board 80-000268RI-2 rev. B, wont reset and no output on serial port.
- Chris,
Glad to hear of your success... if you don't mind, can you detail your setup a bit. Are you using a USB serial adapter (if so which one) or a serial port on your PC motherboard or pci card?
It sounds like the serial port you are... - CB 09:50 AM Software Development: RE: MItyDSP L138-FI-236-RL Industrial IO Board 80-000268RI-2 rev. B, wont reset and no output on serial port.
- Hi,
I finally got it working by directly connecting the serial port to the board.
Thanks for the help,
Chris. - CB 09:15 AM Software Development: RE: MItyDSP L138-FI-236-RL Industrial IO Board 80-000268RI-2 rev. B, wont reset and no output on serial port.
- Hi,
Swapping up the cables sees to make no difference, and if I plug in my work PC into the supplied cross over cable I get an IP.
Thanks,
Chris.
07/08/2013
- JC 09:09 AM Software Development: RE: MItyDSP L138-FI-236-RL Industrial IO Board 80-000268RI-2 rev. B, wont reset and no output on serial port.
- Chris,
Have you tried to add another null modem adapter into the mix or a straight-thru cable just as a sanity check.
-Jonathan - CB 06:54 AM Software Development: RE: MItyDSP L138-FI-236-RL Industrial IO Board 80-000268RI-2 rev. B, wont reset and no output on serial port.
- Hi Bob,
I have been trying with both screen and putty.
Both seem to work fine when I loopback the tx and rx lines on the serial port.
Thanks,
Chris.
07/07/2013
- BD 09:47 PM Software Development: RE: MItyDSP L138-FI-236-RL Industrial IO Board 80-000268RI-2 rev. B, wont reset and no output on serial port.
- Hello Christopher,
What terminal program are you using to connect to the serial port on your PC?
-Bob
07/05/2013
- I am trying to load the hello world program.
So I set up the serial port on my pc with the following settings:
Baud Rate = 115200
Data = 8 bit
Parity = none
Stop = 1 bit
Flow Control = none
I also connected the provided null...
07/02/2013
- SH 04:18 PM Software Development: RE: Simple example needed
- Yes, I'm looking for an example similar to the Hello World ARM/DSP project...
- MW 03:32 PM Software Development: RE: Simple example needed
- Is your ARM processor going to run linux?
- I am using the MityDSP L-138F Industrial development board. I am not finding the examples for that board given in the MDK_2013-05-15 very useful. Is there a simple project that would show the use of the FPGA GPIO core, for example, tha...
- MW 10:51 AM FPGA Development: RE: Hardware Reset
- On the MityDSP-L138F, RESET_IN pin is fed into a TPS3808G33DBVR reset monitor circuit. It is not connected to the FPGA or the OMAP-L138 directly. The output RESET of the TPS3808 is fed to the RESET pin on the OMAP-L138. The OMAP-L138 ...
- CL 10:06 AM FPGA Development: RE: Hardware Reset
- Hi Mike,
In effect yes. I was wondering if the device/circuit which drives the reset pin of the OMAP processor is also
connected to the FPGA and if yes, which pin.
Regards,
Steven.
07/01/2013
- MW 07:49 PM FPGA Development: RE: Hardware Reset
- When there is a power on reset, the FPGA will be re-initialized (the program pin is pulled low) and will require reprogramming.
Are you looking for an additional pin that may be used to reset just the FPGA?
-Mike
- Hi There,
Is there a pin on the MityDSP-L138F processor board FPGA which is attached to a
dedicated power-on/hardware reset source which can be used to initialise/reset registers?
Kind regards,
Steven Bremner.
06/28/2013
- CR 01:19 PM Software Development: RE: mtd->read (...) returned ECC error
- Hi Tim,
since today, the same problems as already mentioned are happening at the moment on my board.
Before I started with my development, I flashed the mityomap-base.jffs2 (MDK_2012-08-10) fs on the NAND. This works pretty well unti...
06/27/2013
- DT 04:56 AM Software Development: RE: Fail to boot the kernel after running setup.sh in DVSDK 4.03
- Hi Mike & Jonathan,
Really appreciate your help!
The kit could load the kernel now.
-Derek
06/26/2013
- JC 04:48 PM Software Development: RE: Fail to boot the kernel after running setup.sh in DVSDK 4.03
- Derek,
Where you aware of this wiki page?
http://support.criticallink.com/redmine/projects/arm9-platforms/wiki/Dv_sdk_notes
It may help getting the dv sdk working with our kernel.
-Jonathan - MW 07:26 AM Software Development: RE: Fail to boot the kernel after running setup.sh in DVSDK 4.03
- Hi Derek,
The kernel that comes with the DVSDK (uImage-da850-omapl138-evm.bin) will not work with the MityDSP-L138 and Industrial I/O board, it is setup to work with the OMAP-L138 EVM kit from TI. You should be able to replace that w... - SH 02:19 PM FPGA Development: RE: Problem building IndustrialIO project build_lcd_rev_c
- I found the solution to the problem. I had to remove the Xilinx device that was in the iMPACT window (left over from the original IndustrialIO example project .ipf file, I assume) and the add a new device which is done by selecting the ...
- MW 01:57 PM FPGA Development: RE: Problem building IndustrialIO project build_lcd_rev_c
- OK clearly it's not finding the file (according to the log). Looks like you have spaces in your path to the bit file, that may be the problem. You might try to copy the bit file to a local path and see if it can open it up. Also, make...
- SH 01:54 PM FPGA Development: RE: Problem building IndustrialIO project build_lcd_rev_c
- That does not seem to work. WHen I double click on "Generate File" I get a big red "Generate Failed" box. The word "bypass" under the XILINX device should change to the file name and it doesn't. I have attached a snapshot of the impact ...
- MW 01:31 PM FPGA Development: RE: Problem building IndustrialIO project build_lcd_rev_c
- Not having the tools up in front of me. I think you can put more than one bit file into a configuration PROM (to support chained programming). Once you select the first part, just click cancel for additional parts and move onto the fil...
- SH 01:22 PM FPGA Development: RE: Problem building IndustrialIO project build_lcd_rev_c
- I built a simple project based on files for GPIO_Test from Conor O in the post "Xilinx design suite 14.2 and MDK_2012-08-10" in this forum. This project built with no errors. I imported the .ipf file from the build_lcd_rev_c example an...
- GG 09:02 AM FPGA Development: RE: Problem building IndustrialIO project build_lcd_rev_c
- Hi Steven,
The issue here is that entity description for the i2c component has changed since the Rev A and B boards. All the code in the "rev_ab : if BOARD_REV = "A" or BOARD_REV = "B" generate" statement is going to be ultimately ig... - MW 07:29 AM PCB Development: RE: Expansion IO mating headers type
- We use "Molex 87759-5050":http://www.mouser.com/ProductDetail/Molex/87759-5050/?qs=%2Fha2pyFadujxwC2WDHBby6OIFIiNwyQwis8wKb55FnE%3D connectors on a couple expansion boards.
-Mike
- CR 04:55 AM Software Development: RE: Data Transfer over DSPLink
- Great!
This works :)
Thanks,
Christian
06/25/2013
- DT 09:30 PM Software Development: RE: Fail to boot the kernel after running setup.sh in DVSDK 4.03
- Hi Jonathan,
Thank you for your reply:)
I'm using the Industrial IO Development Kit with MityDSP-L138F. No change was made before running setup.sh in DVSDK 4.03.
Is the DVSDK 4.03 suitable to the kit? - JC 10:02 AM Software Development: RE: Fail to boot the kernel after running setup.sh in DVSDK 4.03
- Derek,
I'm unclear with what you changed between when it was last working and now.
-Jonathan - DT 12:56 AM Software Development: RE: Fail to boot the kernel after running setup.sh in DVSDK 4.03
- I have build the kernel with codes in git://support.criticallink.com/home/git/linux-davinci.git
No more output is seen on the console after "booting the kernel"
refer to this article: http://processors.wiki.ti.com/index.php/Kernel_... - Following on from a similar question in the forum "Creating FPGA Base-Project - core manager problem" I am trying to build the "build_lcd_rev_c" project. I have used the .vhd files from MDK_2013-05-15/fpga/vhdl and the netlist (.ngc) fi...
- SH 03:48 PM Software Development: RE: CPU Clock and FPGA clock interaction
- Based on what you have told me about Linux operating points, I won't be fooling with the CPU frequency. I will find a workaround to get the clocks I need on the FPGA...
- MW 02:51 PM Software Development: RE: CPU Clock and FPGA clock interaction
- Hi Steven,
If you need a specific frequency for your FPGA, I would recommend adding an external Crystal or Oscillator to your design and bringing it into the FPGA via one of the available GCLK pins. From there you can PLL the frequenc...
06/24/2013
- DT 10:28 PM Software Development: RE: Fail to boot the kernel after running setup.sh in DVSDK 4.03
- uboot env:
> U-Boot > printenv
> ...
- Hi all, I have just running setup.sh in DVSDK_4.03, and MityDSP-L138F could not boot the kernel now.
Serial port outputs:
> OMAP-L138/AM-1808/AM-1810 initialization passed!
> ...
It stops here, no more outputs.
Copy uImage from... - JB 03:10 PM Software Development: RE: Networking requires ifup
- Bingo. Good catch. I didn't look close enough at the comma/space separators.
Thanks for your help!
Joe. - JC 03:05 PM Software Development: RE: Networking requires ifup
- The big difference between your boot and mine is:
I have - JB 02:55 PM Software Development: RE: Networking requires ifup
- The only thing in the boot log that jumps out at me is:
- JC 11:38 AM Software Development: RE: Networking requires ifup
- Joe,
Looking at the networking startup script, all it does is run ifup -a to bring the interfaces up. Could you try running this command instead or "ifup eth0" and see if the command works? Also watch the kernel messages during boot... - Starting a new post for this question.
When the MityDSP (L138F) boots up, I am unable to connect via SSH. I have to login through the serial port and run "ifup eth0" first - then everything works just fine.
Occurs using static (bo... - For various reasons I would prefer an FPGA clock of 96 MHz. Am I right in assuming that if I modify the kernel to get a CPU clock of 288 MHz I will get what I want? If so, which file in the kernel do I need to modify to get my desired ...
- VG 10:29 AM Software Development: RE: DSP Helloworld execution error
- commenting out the deletes solved the problem
thanks - JC 08:57 AM Software Development: RE: DSP Helloworld execution error
- Vinod,
If you look at the arm_main.cpp file, the application doesn't wait for you to press q. Its currently setup so that q can be used as an escape if the dsp never sends its response. If you would like it to wait for the user to hi... - hi,
I could successfully compile the arm_main.cpp in eclipse and dsp_main.cpp in ccs. But upon execution the exit of applicaton happened even before i entered q and i am also getting the following error. pls help me out with this
r... - JC 10:21 AM Software Development: RE: Missing Angstrom Packages
- Good to know.
As far as eth0 not coming up some things to look at:
* Make sure that ip=dhcp was passed to kernel on bootargs
* Make sure /etc/init.d/networking is started on startup. Mine is symlinked in /etc/rcS.d. - JB 09:51 AM Software Development: RE: Missing Angstrom Packages
- Thanks Jonathan -
That worked just fine - I started down that path but didn't get the right combination of packages. One of the PAM ipk's triggered about 24 additional package downloads and it installed just fine.
Also got NTP ins... - NA 10:05 AM Software Development: RE: DSP Hello World error message
- Thanks for your help
- JC 09:02 AM Software Development: RE: DSP Hello World error message
- Nick,
I've just updated the wiki page with a new arm_main.cpp and cleaned up some of the instructions. The error messages have been hidden for now by removing the delete statements. We are planning on working towards tracking the AS... - JC 09:02 AM Software Development: RE: Warning messages when running DSP Hello World
- Nick and François,
I've just updated the wiki page with a new arm_main.cpp and cleaned up some of the instructions. The error messages have been hidden for now by removing the delete statements. We are planning on working towards tr...
06/23/2013
- The link to "FPGA Core Creation Guidelines" appears to be broken in the Wiki - can anyone point me to the relevant information?
Hi
Wat are recomended type of male headers mating with the Industrial IO Development Kit expansion IO connectors J700-J702.
Heniek
06/21/2013
- JC 11:47 AM Software Development: RE: Missing Angstrom Packages
- I was using the latest MDK filesystem but I suspect it will work the same for your version.
-Jonathan - JC 11:46 AM Software Development: RE: Missing Angstrom Packages
- Joe,
This seems to be a problem with the latests Angstrom repos. I was able to find a forum post related to this. https://groups.google.com/forum/#!topic/beagleboard/bsiWha74mc8
Download the ipk from http://www.angstrom-distributi... - Good Morning -
Has anyone had any luck getting "missing" Angstrom packages installed when using the 2012-08-10 MDK? The two examples I've been looking for are sudo and ntp:
root@mityomapl138:/home/user# opkg install sudo
Unknown ...
06/20/2013
- JC 03:35 PM Software Development: RE: DSP Hello World error message
- [Edit] Woops I quoted myself instead of edited.
- JC 03:35 PM Software Development: RE: DSP Hello World error message
- Steven,
I just followed the [[DSP_Hello_World]] tutorial and didn't have the same build errors you did. It should be noted though that the example files in the latest MDK were not updated and would exhibit these errors you mentioned.... - MW 11:12 AM Software Development: RE: Data Transfer over DSPLink
- Messages don't have to be strings. You can create message structures (and include headers, for example, that contain message IDs, etc.) and overlay them onto the buffers passed using the APIs....
-Mike
- Hi,
I was able to run the "DSP Hello World" totorial in the wiki but there i can only transfer messages between both cores. Is there a, more or less, easy way to modify your "DSP Hello World" example to transfer other datas? How can I... - CR 10:07 AM Software Development: RE: GPIO Output immediately after power on
- Thanks Mike,
the stronger pull downs should be acceptable in my design.
christian
06/19/2013
- SH 06:48 PM Software Development: RE: DSP Hello World error message
- Hi:
I'm getting the same assertions. I re-flashed the kernel and the file system on the board with the latest images from the MDK_2013-05-15 BSP (Kernel version 3.2.0), and the files that I used to build the example also came from th... - MW 01:39 PM Software Development: RE: GPIO Output immediately after power on
- The only way I know of is to use stronger pull downs (1 or 2K I think) externally. You'll burn a bit more power and have to cobb up your board if it's already implemented....
We've been burned by those pull-ups quite often, particula... - CR 12:51 PM Software Development: RE: GPIO Output immediately after power on
- Ohh, OK.
I found a way at Ti's support page how to change the UBL to set the defaultstate of the PUPDSEL-registers:
http://e2e.ti.com/support/dsp/omap_applications_processors/f/42/t/185405.aspx?pi21918=1
but this change will hap... - MW 12:14 PM Software Development: RE: GPIO Output immediately after power on
- Keep in mind that the OMAP-L138 also has built in pull-up and pull-down resistors on just about every pin.
On reset, IIRC, most of the pins have weak pull-ups enabled. Search for the PUPEN register in the TRM and check the state. Un... - CR 12:02 PM Software Development: RE: GPIO Output immediately after power on
- Tim,
thanks for the fast reply!
The following Pins on the L138 (no FPGA-Version)SoM are driven at the beginning of the startup sequence, also when i'm only in the u-boot terminal.
- 14
- 32
- 36
- 44
- 118
- 128
- 134
- 1... - TI 11:34 AM Software Development: RE: GPIO Output immediately after power on
- Christian,
there are 2 possibilities for where pins are being enabled and potentially toggled. A lot of this depends on which pins you are talking about too.
The processor has a pre-defined reset state for every pin, which is listed in... - Hi,
Does anybody know where it comes from, that i get immediately a signal on some pins after the module is powered on???
This happens before the Linux kernel will loaded! Has this something to do with the configuration of u-Boot-Boo...