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From 12/22/2012 to 01/20/2013

01/17/2013

GG 11:36 AM FPGA Development: RE: Creating FPGA Base-Project - core manager problem
Hi Christian,
We do not currently distribute the vhdl for the MDK cores that are missing from that project. We do, however, distribute the netlists, which will allow you to build that project. Include the netlists from MDK\fpga\cores\...
Gregory Gluszek
MF 11:05 AM Software Development: RE: TFTP (or FTP) Server
Yes, I have used that.
We are developing an embedded product. Our application code will run from startup. It will create files. We are also developing a companion application on a host PC to communicate with the embedded application....
Mary Frantz
MW 10:50 AM Software Development: RE: TFTP (or FTP) Server
Normally, we use scp to transfer files to a remote server on the ARM.
You can configure ssh keys to allow transfers without having to type a password in, if you need it.
-Mike
Michael Williamson
MF 10:04 AM Software Development: TFTP (or FTP) Server
How do you start a tftp (or ftp) server on the ARM? Or how do you transfer files to a remote server programmatically? I need to have the server start up automatically or be started from a function call, not from a shell command line.
...
Mary Frantz
TE 11:03 AM Software Development: RE: Bootcmd break
That is exactly what I need. Thanks Mike. Tim Eastham
MW 11:01 AM Software Development: RE: Bootcmd break
Tim,
Just hit a key and break and load the code manually?
If you want the FPGA to be loaded, then we often make a separate script for loading the fpga, e.g:
setenv progfpga 'sf probe 0;sf read 0xc0700000 0x580000 0x80000;loadfpg...
Michael Williamson
TE 10:51 AM Software Development: Bootcmd break
I am presently storing the firmware in non-volatile memory when I hand it off for testing. The problem is, sometimes I need to just download some code into ram to test. Is there a way to provide an opportunity to break in a bootcmd? H... Tim Eastham

01/16/2013

JC 04:33 AM Software Development: RE: How Can I use UART0 & UART2 in MityDSP-L138F?
jong sung choi wrote:
> hi mike. thank you but
> ...
jong sung choi
JC 04:32 AM Software Development: RE: How Can I use UART0 & UART2 in MityDSP-L138F?
hi mike. thank you but
I just did you notice to me "Network configuration" article.
It can changed Ethernet config 2 to 3 or 3 to 2 but it can not changed 2 or 3 to 0. is it normal?
jong sung choi

01/15/2013

MW 07:14 AM Software Development: RE: How Can I use UART0 & UART2 in MityDSP-L138F?
You should be able to disable the ethernet device by setting the ethernet configuration in u-Boot to indicate no ethernet according to "this wiki page":http://support.criticallink.com/redmine/projects/arm9-platforms/wiki/Network_configur... Michael Williamson
JC 01:07 AM Software Development: How Can I use UART0 & UART2 in MityDSP-L138F?
Hi I'm currently using your MityDSP-L138F SOM with custom baseboard which I designed.
In Our Baseboard UART0(pin 81 txd, pin 83 rxd) connected to GPS receiver and UART2(pin 59 txd, pin 61 rxd) connected to Modem some reason.
I'm succ...
jong sung choi
ML 06:48 AM Software Development: Ethernet gadget - unable to connect to host PC
Hi,
I have problems connecting to the industial IO/AM1808 card using device USB. I have built the kernel and the ethernet gadget module from git (3.2.x) - the module loads without any errors - I do get a usb0 network device right away...
Mads Olav le Maire
ML 04:12 AM Software Development: RE: AM1808-industrilal I/O performance
Thanks,
Missed that one - it's working.
Mads-l
Mads Olav le Maire

01/14/2013

CR 03:46 PM FPGA Development: RE: Creating FPGA Base-Project - core manager problem
Hi Greg,
i opend the "build_lcd_rev_c" example project and migrate it to the 14.4 version. I think the migrtion works but there are some files needed what i can't find in the MDK.
see the attached picture. Therfore i couldn't try to ...
Christian Rückl

01/13/2013

DG 09:39 PM Software Development: RE: Debugging DSP in VirtualBox?
I have being using SD XDS510 USB + VirtualBox 4.1.16 + CCS 5.2.0 with no problems. Dmitry Gorulko
GG 05:07 PM FPGA Development: RE: Creating FPGA Base-Project - core manager problem
Hi Christian,
The ISE Webpack license should be sufficient for what you are trying to do.
Try opening one of the projects in MDK\examples\industrial_io\fpga\build_* and see what that tells you. You will most likely be asked to mi...
Gregory Gluszek

01/12/2013

CR 02:23 PM FPGA Development: Creating FPGA Base-Project - core manager problem
Hi,
I've started with the FPGA-design in ISE Webpack 14.4.
I added all files from "MDK_2012-08-10\fpga\vhdl" to the project and also the "EMIFA_dcm.xco" file. I tried to regenerate this core in my project but I don't know why, but i...
Christian Rückl
CR 02:11 PM Software Development: RE: DSP Link example not working
Mike,
I got it and it's working now :)
Thanks.
Christian
Christian Rückl
CR 02:10 PM Software Development: RE: u-Boot configuration for DSP-Startup
Tim,
It's working now.
Thanks!
Christian
Christian Rückl

01/10/2013

MW 12:18 PM Software Development: RE: PRU Kernel Driver
The PRU drivers are not installed. You'll need to rebuild the kernel. You may need to patch in the PRU drivers as well.
-Mike
Michael Williamson
JY 11:20 AM Software Development: PRU Kernel Driver
Do any of the kernels built by critical link have the PRU drivers installed? Or do I have to rebuild a kernel with this driver?
Jeremy
Jeremy Young
MW 08:14 AM Software Development: RE: AM1808-industrilal I/O performance
Oh. You should be all set, see [[Setting_CPU_Speed]].
-Mike
Michael Williamson
ML 08:11 AM Software Development: RE: AM1808-industrilal I/O performance
Hi,
Yes - both kernel settings is set to 'y'.
root@vdr:/sys/devices/system/cpu/cpu0/cpufreq# cat scaling_available_frequencies
456000 408000 372000 300000 200000 96000
Mads-l
Mads Olav le Maire
MW 07:58 AM Software Development: RE: AM1808-industrilal I/O performance
Can you check if CONFIG_CPU_FREQ=y is set in the 3.1 kernel configuration. Also can you confirm that the CONFIG_CPU_FREQ_GOV_USERSPACE=y?
can you also:
Michael Williamson
ML 02:24 AM Software Development: RE: AM1808-industrilal I/O performance
Hi,
I am usually running the 3.1.x kernel that I build from the git repository downloaded from Critical link. Here are kernel logs for both this kernel and the kernel which resides in SPI-flash from factory.
I notice that the /sys/ke...
Mads Olav le Maire

01/09/2013

MC 11:38 AM FPGA Development: RE: FPGA GPIO: toggle problem
Dear all,
by the way, Greg was right saying that the GPIO core configuration I posted the first time could work (IndustrialIO_top file; a day ago): today I tried to reflash that file on fpga, and monitoring the outputs on the back con...
Michele Canepa
MW 10:07 AM FPGA Development: RE: FPGA GPIO: toggle problem
ON the bitfile generation, please make sure that your unused IOBs are "floating" and not pulled down or up.
-Mike
Michael Williamson
GG 09:58 AM FPGA Development: RE: FPGA GPIO: toggle problem
Hi Michele,
The only time I've experienced the board reseting due to an FPGA load is when I was mistakenly loading the wrong file (i.e. I tried to cat the .bit file instead of the .bin...). If you take the file you sent me and switch ...
Gregory Gluszek
MC 05:25 AM FPGA Development: RE: FPGA GPIO: toggle problem
Hi Greg,
thank you for the hint and the fast answer!
Now I have another problem: I modified the GPIO instantiation as you suggested, following the wiki link you submit: in particular I followed the "GPIOs as Outputs" template.
I suc...
Michele Canepa
MW 09:06 AM Software Development: RE: AM1808-industrilal I/O performance
What version of the kernel are you using? The pre-programmed one on FLASH? That version of the kernel may be older than the patch that adds support for upping the speed beyond 300 MHz.
Can you do a "dmesg" and dump the log file?
...
Michael Williamson
ML 08:03 AM Software Development: RE: AM1808-industrilal I/O performance
This is the "factoryconfig" printout:
U-Boot > factoryconfig
Factory Configuration:
Config Version : 1.1
MAC Address : 00:50:C2:BF:8B:D2
Serial Number : 110009
FPGA Type : 0 [none]
Part Number : 1808-FX-225-RC
U-Boo...
Mads Olav le Maire

01/08/2013

GG 12:54 PM FPGA Development: RE: FPGA GPIO: toggle problem
Hi Michele,
The reason that you're not seeing the echo'ed value of the GPIO change is due to the way the core is connected. In order to solve this you will need to connect the o_io outputs of the GPIO core back to i_io. This was most ...
Gregory Gluszek
MC 09:53 AM FPGA Development: RE: FPGA GPIO: toggle problem
Sure Greg, thanks for the help!
The name is IndustrialIO_top, because I worked on it from your file..
Michele Canepa
GG 08:59 AM FPGA Development: RE: FPGA GPIO: toggle problem
Hi Michele,
Could you post your VHDL instantiation of the GPIO core? Perhaps some of settings or ports were set incorrectly...
Thanks,
\Greg
Gregory Gluszek
MC 03:56 AM FPGA Development: FPGA GPIO: toggle problem
Dear All,
after I successfully created a GPIO core on the FPGA framework, burnt onto the FPGA, successfully enumerated the FPGA cores and installed the fpga_gpio kernel object, I was trying to toggle a GPIO pin on FPGA using userspace...
Michele Canepa
MW 09:48 AM Software Development: RE: AM1808-industrilal I/O performance
In u-boot, run the command "factoryconfig".
-Mike
Michael Williamson
ML 09:31 AM Software Development: RE: AM1808-industrilal I/O performance
Here is some information - cannot get any useful information from the bootlog.
*From Bootloader startup:*
Jumping to entry point at 0xC1080000.
U-Boot 2009.11 (Mar 31 2011 - 19:39:18)
I2C: ready
DRAM: 128 MB
NAND: 256 MiB
...
Mads Olav le Maire

01/07/2013

MF 12:38 PM Software Development: RE: MSGQ access
The answer was in the Makefile. I had to add in all the defines.
DEFINES=-DTRACE_ENABLE \
-DOS_LINUX \
-DMAX_DSPS=1 \
-DMAX_PROCESSORS=2 \
-DID_GPP=1 \
-DPROC_COMPONENT \
-DPOOL_COMPONENT \
-DNOTIFY_COMPONENT \
-DMPCS...
Mary Frantz
GG 09:20 AM Software Development: RE: MSGQ access
Hi Mary,
I think the reason you're getting a compiler error is because you're only including a single file from the DSPLink code. Take a look at the Makefile used to create the libdsp libraries (MDK/sw/ARM/linux/libdsp/Makefile) for ...
Gregory Gluszek

01/04/2013

MF 11:48 AM Software Development: MSGQ access
Is there a way to use the MSGQ library? I would like to call MSGQ_locate() and MSGQ_close(). I have a project based on the HelloDSP example, but when debugging if I stop before the application ends, I get an error opening the message qu... Mary Frantz
MW 10:43 AM Software Development: RE: AM1808-industrilal I/O performance
Hi Mads-l,
Can you print out the factory configuration information? Certain modules (Revision "A" silicon, IT silicon and lower speed grade options) do not support frequencies above 300 MHz (rev A silicon, 375 for IT silicon) and the...
Michael Williamson
ML 10:15 AM Software Development: AM1808-industrilal I/O performance
I am currently testing network performance. Having installed the netperf utility in my root file system, I am able to test performance between my development machine and the Industrial i/O card.
Running netperf, measuring network thr...
Mads Olav le Maire

01/03/2013

JY 04:54 PM Software Development: Profibus Matser development on the Profibus DevKit
Has there been any work done regarding a Profibus master on the MityArm AM1810? Jeremy Young

01/02/2013

SW 09:01 AM PCB Development: RE: SATA board connector
Alex,
I haven't had the opportunity to get a SATA connector for our board. That is the one I was looking at. I like to hear you were able to get it flush on the board. I will look into getting some and trying it out. Thanks, Scott
Scott Whitney

12/31/2012

CO 10:17 AM PCB Development: RE: Used EMIFA-Signals/Pins
That's great Mike - exactly what I hoped to hear :)
I was wondering if you had done precisely this given that the wiki said the non-FPGA modules would work. But I have an L138F here not an L138 so couldn't really check it myself and w...
Conor O
MW 08:10 AM PCB Development: RE: Used EMIFA-Signals/Pins
Hi Conor,
On the Non-FPGA modules, all 4 of these signals have a 1K Ohm series resistor between the on-board nets and the edge connector. This effectively makes putting a non FPGA module into a board like the Industrial I/O kit OK if...
Michael Williamson
CO 07:49 AM PCB Development: RE: Used EMIFA-Signals/Pins
In the case of the Industrial IO board though, pins 197 through 200 are tied directly to 3.3V for the VCCO_[0,1] bank connections to the FPGA. These correspond to: Conor O

12/27/2012

JS 01:51 PM Software Development: RE: Debugging DSP in VirtualBox?
Do you know of any emulators that are useable from within the current Oracle VirtualBox or is there a work around? It would be nice to use the same Virtual Box to develop for both the DSP and ARM. Jim Sheffler

12/26/2012

TC 03:55 PM Software Development: RE: SYSBIOS & Starterware
Hi Jean-Baptiste -
It would be my understanding that if you are going to use SYS/BIOS that you should start with a sys/bios project. Likely sys/bios needs to be initialized, etc. So, simply starting with starterware and adding a sys/...
Thomas Catalino

12/23/2012

MW 09:36 PM Software Development: RE: after update the root-FS and Kernel NFS errors appear at startup
The most recent filesystem involved transitioning from Anstrom 2008 to Angstrom 2012.05, which also migrated from the well understood SysVinit scripts to systemd. When we built up the reference filesystems, we failed to enable the netwo... Michael Williamson
CR 10:48 AM Software Development: RE: after update the root-FS and Kernel NFS errors appear at startup
To give you more inforamtion about the startup sequence I add the whole log-file of it.
Can it be that there is something wrong with the delivered kernel-image in the MDK? Maybe the networkconfiguration.....
Christian Rückl
CR 09:45 AM Software Development: after update the root-FS and Kernel NFS errors appear at startup
Hi,
I updated the Root-File-System on my module with the Base-FS out of the latest MDK (2012-08-10). I copied also the kernel from the new MDK\images on the modul.
Now I get the following Errors during the startup sequence:
- Fail...
Christian Rückl
MW 09:28 PM Software Development: RE: DSP Link example not working
Ok,
I will post to your other topic for enabling the network on the newer MDK.
Are you building the example software or using precompiled binary images from our wiki?
For this error, the main issue is that the newer filesystems ...
Michael Williamson
CR 03:04 PM Software Development: RE: DSP Link example not working
Mike,
sorry for my really late response....
I was using the factory installed filesystem with the associated kernel. Then i installed the newest base-filesystem with the kernel from MDK 2012-08 on my module. But after installation ...
Christian Rückl

12/22/2012

TI 07:24 PM Software Development: RE: u-Boot configuration for DSP-Startup
Christian
this page
http://support.criticallink.com/redmine/projects/arm9-platforms/wiki/DSP_Quick_Start
should explain it.
cheers
/Tim
Tim Iskander
CR 07:19 PM Software Development: RE: u-Boot configuration for DSP-Startup
Thank you Tom for your quick answer!
For the moment I have a DSP-only setup but later I want to use both: Linux and my DSP-application.
Can you explain me also how I can startup both?
Christian
Christian Rückl
TI 07:11 PM Software Development: RE: u-Boot configuration for DSP-Startup
Christian
You can store the DSP image in flash. I am assuming you are running a DSP-only setup (i.e. no linux system running).
To change the boot command you stop the u-boot process (press enter before the count-down ends) and edit the...
Tim Iskander
CR 04:17 PM Software Development: u-Boot configuration for DSP-Startup
Hi,
At the moment I'm at a point where I don't know how...
I have a DSP-image and want to load it at the startup. I red in the u-Boot wiki that there is a special command bootdsp available for this.
But my first question about t...
Christian Rückl
 

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