Activity
From 07/31/2012 to 08/29/2012
08/28/2012
- CO 07:08 AM PCB Development: RE: MMCSD
- Sorry, I meant GPIO_0[6 or 7 or 13 or 15] as they are on the J700 connector along with MMCSD0...
- CO 04:16 AM PCB Development: RE: MMCSD
- Ah yes, that makes sense - I forgot about the degree of pin muxing going on in the L138 and the UPP would make sense there. My design is based around the WL1271 as well actually, although I've no reason to suppose a TXB0108 wouldn't do t...
08/27/2012
- MW 07:06 PM PCB Development: RE: Used EMIFA-Signals/Pins
- Yes, there should be several.
The only interface on the EMA on the modules with non-FPGA pins is the NAND (x8, but the upper 8 bit lines should probably be left alone). The NAND interface uses the following signals:
EMA_D(15..0)
... - CR 06:48 PM PCB Development: RE: Used EMIFA-Signals/Pins
- This is the mainquestion: Are there some not used Pins of the EMA interface which i can use as GPIO and keep the onboard memory working at the same time?
I need the GPIOs on the EMA-Pins, because i wanna connect some devices to the dev-... - MW 11:13 AM Software Development: RE: Vision Development Kit - What toolchain?
- Any of the ARM side GCC toolchains released should work with the VDK. I would recommend using the most recent one distributed.
The DSP side, I believe, was compiled with CGT 6.1.19, but any version 7.0 chain should work.
-Mike
- MW 10:28 AM PCB Development: RE: MMCSD
- Hello Conor,
Some background: the MMCSD1 was routed through the FPGA because it is pin-muxed with the UPP channel 0, which gets used quite a bit by our customers to push acquisition data from the FPGA into the OMAP-L138 processor. Ou... - Hi all,
I was looking at interfacing a wireless module to the MMCSD ports on the MityDSP L138F module. There are two ports available - one out to the dev board and one to the FPGA. The dev board is 3.3V LVCMOS but the module I have in...
08/23/2012
- CR 04:12 PM PCB Development: RE: Used EMIFA-Signals/Pins
- The one without the FPGA.
- MW 12:42 PM PCB Development: RE: Used EMIFA-Signals/Pins
- For which module? One that includes an FPGA or not?
- Hi,
which EMA-Pins of the EMIFA-Interface already connected to the L138-onboard-peripherials?
I couldn't found any detaild informations about.
Thanks,
Christian - WC 09:05 AM PCB Development: RE: MityDSP-L138F Mounting Holes (Posted on behalf of a customer)
- Mike, thanks for the quick response.
A STEP model is currently available at [http://support.criticallink.com/redmine/attachments/1293/MityDSP-L138F.step] unless you're referring to a newer version.
The keep-out area shown in the d... - MW 08:36 AM PCB Development: RE: MityDSP-L138F Mounting Holes (Posted on behalf of a customer)
- We may have a STEP model of the module, let me see if I can get that published.
- MW 08:35 AM PCB Development: RE: MityDSP-L138F Mounting Holes (Posted on behalf of a customer)
- Short answer is yes, 1.6mm maximum height. And you should probably hold to that height for the entire area below SOM as per the design guide, as there are a couple of small IC's outside the area in the drawing that was posted and there ...
- WC 08:11 AM PCB Development: RE: MityDSP-L138F Mounting Holes (Posted on behalf of a customer)
- The drawing you provided highlights a keep-out area for high profile components. What is the maximum component height allowed in this area? Is it 1.60 mm as specified in Figure 2 of the carrier board design guide?
Thanks.
08/22/2012
- Can JTAG debugging be performed from within CCS running in a VirtualBox?
- What GCC toolchain is used to build the VDK Linux application? DSP?
08/14/2012
- MW 03:08 PM Software Development: RE: L138 - DSP Timer interrupt question ...
- Are you running DSPLINK to load/run program the C674x side?
DSPLINK uses interrupt levels 4 and 5 for the ARM/DSP IPC. You might try using a level above 5 for the interrupt, particularly if you are seeing sporadic interrupt behavior.... - (posted on behalf of a customer)
We are running on the board on the C674x side and have some success with our periodic timer interrupt. However, it seems we are not setting up the interrupt controller properly since we sometimes get p...
08/11/2012
- MW 08:18 AM Software Development: RE: General SW questions on the MityDSP L138F development kit
- Hi Greg,
At the risk of writing a novel, I recommend you take a peek at the following pages / sites / documents:
- "MityDSP-L138F DataSheet":http://www.mitydsp.com/images/upload/File/MityDSP-L138F%20Spec.pdf
- "MityDSP-L138F Archi...
08/10/2012
- A few general SW questions for the novice user. We are planning to use the MityDSP L138F development kit. Here are some general questions:
1. Can our development SW code run out of FLASH?
2. If not, what is the footprint our deve...
08/06/2012
- JB 09:19 PM Software Development: RE: RS232 UART Needed
- Initial indications are good that the ARM changes worked. Attached are the two files modified: @baseboard-industrialio.c@ and @da850.c@. The originals for both are from the 2012-03-12 MDK with a path of @MDK_2012-03-12/sw/ARM/linux/linux...
- MW 02:02 PM Software Development: RE: RS232 UART Needed
- Sorry. da8xx_cfg_reg_list should have been davinci_cfg_reg_list(), typo, my mistake.
For the FPGA drivers, you should be able to cd to the FPGA drivers directory (MDK_2012-03-12/sw/ARM/linux/drivers/fpga) on the MDK and run: - JB 01:37 PM Software Development: RE: RS232 UART Needed
- h1. Summary
# Is my approach to enabling UART2 on the ARM sound?
# What is the correct way to install the additional modules provided for the FPGA and DSPLINK?
h1. Detail
When I came in this morning, I posted my prior question... - MW 10:25 AM Software Development: RE: RS232 UART Needed
- They don't. The critical link BSP linux kernel is tracking the mainline, not the TI PSPs for the OMAP-L138. TI has pushed most peripheral support from it's PSP into the mainline, with a couple of minor exceptions. We felt tracking the...
- JB 08:10 AM Software Development: RE: RS232 UART Needed
- OK, I think I found the ARM part of the solution. Part of it comes from this wiki [[http://support.criticallink.com/redmine/boards/28/topics/1365]]. The other part comes from [[http://processors.wiki.ti.com/index.php/Enabling_UART1_on_AM...
- MW 10:30 AM Software Development: RE: USB from uBoot (posted on behalf of a customer)
- Currently, USB stick support for the MityDSP-L138F u-Boot port has not been enabled/implemented/tested.
The u-Boot supports (tested) the following media:
- EMAC (MII or RGMII) via TFTP or NFS
- onboard SPI NOR FLASH
- onboard NAN... - We attempted to access the evaluation board's USB port using uBoot and didn't have much success.
Should this be working?
The uBoot command we used was 'usb reset'. And we are using the L138 SOM with the pre-loaded uBoot.
Th... - SW 09:21 AM Software Development: RE: EMIFA clock
- Thanks for that explanation Mike. I asked about this because I was seeing odd behavior in my OMAP/FPGA applications. My FPGA designer was using the uPP xmit clock from the OMAP for a uPP channel back to the OMAP. He also uses the EMIF...
08/05/2012
- MW 08:29 PM Software Development: RE: RS232 UART Needed
- Hi Jeff,
Can you confirm you are running the kernel you are building out of MDK_2012-03-12? The uname command you ran indicates a 2.6.34 kernel, and that MDK should have a 3.2 release kernel and a newer filesystem. If you are runnin... - JB 07:52 PM Software Development: RE: RS232 UART Needed
- Thinking ahead, how does I get the ARM to "let go" of GPIO pins for use by the DSP?
For my immediate project, I need:
1) an RS-232 TTL-level input with RX, TX and an edge-triggered interrupt on DCD;
2) a GPIO line for output
3) it would be preferable if the RS232 lines could come out of an existing connector, e.g. ...- MW 01:32 PM Software Development: RE: EMIFA clock
- Hi Scott,
So there is code in the linux kernel to recompute the EMIFA frequency and attempt to keep it at specified maximum frequency (which, I believe, by default, is limited to 100 MHz). Last time I checked, if you ask for 456 MHz ...
08/03/2012
- Dear Sirs,
I've seen that in the MDK-release there is the SPI Core in ngc file format, for Spartan 6 FPGA of the MityDSP-L138F card.
My task is to implement various SPI controller, in order to maximixe the througput of various ADC's ...
08/01/2012
- GG 09:21 AM Software Development: RE: Starter Guide: "Boot the MityDSP-L138 up into linux." - How?
- Hi Keith,
If you purchased the cards without a development kit then it is expected that they come only with u-boot installed. All of the cards purchased from us will have at least u-boot installed.
\Greg - EB 08:52 AM PCB Development: RE: MityDSP-L138F Mounting Holes (Posted on behalf of a customer)
- Thanks Alex
That shows everything I need.
07/31/2012
- GG 06:04 PM Software Development: RE: EMIFA clock
- Hi Scott,
Yes, I'm fairly certain that changing the CPU clock will affect the EMIFA clock. By default the EMIFA and CPU clock are at a 1:3 ratio. I believe this ratio is variable though. You can find additional details in the Chapter ... - Hello,
I've got an Industrial IO board and want to change the cpu clock frequency from 300 to 45 MHz. I know this will change the uPP clock to above spec 456/4=114MHz instead of 75MHz. Will this also change the clock on the EMIFA? th... - AB 03:49 PM PCB Development: RE: MityDSP-L138F Mounting Holes (Posted on behalf of a customer)
- Now I've attached the updated PDF.
Alex - AB 03:48 PM PCB Development: RE: MityDSP-L138F Mounting Holes (Posted on behalf of a customer)
- Emmett,
Sorry about the late reply on this issue. Hopefully you have resolved it satisfactorily but if not I believe I have the dimension you requested:
From the Center Line of Pin 1 to the Center Line of the SODIMM connector is 16...