Activity
From 05/20/2011 to 06/18/2011
06/13/2011
- RG 05:21 PM FPGA Development: RE: FPGA configuration
- Hi Mike,
FYI, I just had a chance to try a bad configuration file, and the INIT pin was indeed low after programming.
Thanks,
Rob
06/06/2011
- GG 10:35 AM Software Development: RE: Where can I get the files listed on the DSPLink Hello World wiki?
- Hi Mads,
Most of the files you need are in the latest tarball release. I've sent you the remaining files, which will be added as a part of our next release.
Let us know if you have any further issues.
\Greg - MC 07:14 AM Software Development: RE: Where can I get the files listed on the DSPLink Hello World wiki?
- Hi
I am also looking for these files...
Could you email me them too?
Many thanks,
Mads
06/02/2011
- RG 12:17 PM Software Development: RE: ECC
- Ok, Thanks for the quick response.
- MW 12:11 PM Software Development: RE: ECC
- We are using mobile DDR2 x16 for our modules. There is no support for ECC.
-Mike
- Hello,
Does the MityDSP L138 module support ECC for the DDR2 RAM? If so, is there software support to enable this feature?
Thanks,
Rob Gillis
05/27/2011
- MW 10:00 AM FPGA Development: RE: FPGA configuration
- Rob,
The INIT_B pin (connected with external pullup to OMAP pin D2, AXR7/EPWMITZ[0]/GP1[15]) is an open drain output during/after config. If a CRC error is detected, it asserts low. So you could check the state of that pin after you... - RG 09:37 AM FPGA Development: RE: FPGA configuration
- Mike, I figured that readback may be an issue, but thanks for confirming it for me. Does the INIT pin provide proof (via CRC?) that the .bit file has been programmed correctly, or just that it's been taken out of programming mode?
Th...
05/26/2011
- MW 08:50 PM FPGA Development: RE: FPGA configuration
- Hi Rob,
Right now, we don't have an easy way to verify configuration cooked up.
The current MityDSP-L138F family of SOMs unfortunately do not connect the DONE pin to the OMAP or 1808. I think the INIT pin is available to monitor c... - Hello,
I'm trying to figure out an approach for validating the bitfile has been programmed correctly, and for monitoring the FPGA while running to detect corrupt configuration bits. Does the L138 board support configuration readback?...