Activity

From 02/25/2011 to 03/26/2011

MW 12:04 PM Software Development: RE: FPGA_GPIO input polling: Hi Brian,
The current fpga-gpio arm linux driver does not support interrupt notification at the moment. However, I think I can update the driver to support this function fairly quickly. Let me see if I can get you something in the n... Michael Williamson
BR 11:13 AM Software Development: FPGA_GPIO input polling: Hi
I'm trying to get my user application notified when a FPGA GPIO input pin goes high.
I have created a FPGA image containing the FPGA Base (EMIFA) and GPIO modules. I can now toggle output pins and read status for input pins (in... Brian Rasmussen

BR 11:09 AM Software Development: Problem with FPGA reload: Hi
I have a minor problem when I reload the FPGA image after the OMAP has booted into Linux. I'm not able to export and toggle GPIO's using the sysfs (sys/class/gpio).
If I boot the complete system like this, it works fine:
1. Bo... Brian Rasmussen

ZW 10:16 PM Software Development: RE: Where can I get the files listed on the DSPLink Hello World wiki?: I'm also looking for the files, would you plese email me too. zhiming wu

BR 10:40 AM Software Development: RE: Include Path / Where is the correct source files?: Hi Mike
I have now found out how to map kernel space into user space, though I don't have an example working yet.
Another question has come up: Will I be able to read/write to the FPGA through the EMIFA, if I just map the memory ar... Brian Rasmussen
BR 04:29 AM Software Development: RE: Include Path / Where is the correct source files?: Hi Mike,
I will search the net for a mmap example. Regarding the NAND device it is already mounted.
Thanks for your help so far.
Best regards
Brian Brian Rasmussen

MW 12:51 PM Software Development: RE: Include Path / Where is the correct source files?: Brian,
Good to hear the gpio is working for you.
You are trying to memory map FPGA space into userspace. The way to go for that is to implement the mmap feature in your kernel driver. I think there are some examples on the web fo... Michael Williamson
BR 10:43 AM Software Development: RE: Include Path / Where is the correct source files?: Hi Mike
I now have the FPGA communication up and running, and I can toggle an FPGA output pin from the command line (using /sys/class/gpio/...). So far so good! :-)
Next step is to re-work the FPGA modules and the linux drivers... ... Brian Rasmussen

TI 02:17 PM Software Development: RE: How Do I Get SD Memory Working for Critical Link Carrier Board From Linux: David
the mount is done by udev. The scripts for udev are in /etc/udev/scripts
the file mount.sh is the one that mounts the fs and sets the options
cheers
/Tim Tim Iskander
DK 02:12 PM Software Development: RE: How Do I Get SD Memory Working for Critical Link Carrier Board From Linux: Tim,
Thanks, remounting the drive in async mode drastically increased performance. I am now getting 4.3MB/s using 1K block writes (versus 0.2 MB/s for sync mode). Where is the hot plug script located on the file system? I plan on m... david kasper

TI 10:21 AM Software Development: RE: How Do I Get SD Memory Working for Critical Link Carrier Board From Linux: Michael Williamson wrote:
> Hi David,
> ...
From the referenced page..
The performance numbers can be severely affected if the media is mounted in sync mode. Hot plug scripts in the filesystem mount removable media in sync mode to ens... Tim Iskander
MW 10:14 AM Software Development: RE: How Do I Get SD Memory Working for Critical Link Carrier Board From Linux: Hi David,
TI has published performance numbers for their basic kernel (which our port essentially sits on top of) here:
http://processors.wiki.ti.com/index.php/DaVinci_PSP_03.20.00.11_Device_Driver_Features_and_Performance_Guide#MM... Michael Williamson
DK 10:05 AM Software Development: RE: How Do I Get SD Memory Working for Critical Link Carrier Board From Linux: Tom,
Thanks for your response. We would desire 4MB/s. Do you know how close to that number we could achieve?
David Kasper david kasper
TC 09:19 AM Software Development: RE: How Do I Get SD Memory Working for Critical Link Carrier Board From Linux: Hi David,
What throughput do you need or expect to get? I don't think the SD card is ever going to be as fast as a RAM based file system. I'm not sure what performance you are trying to get to.
Thanks,
Tom Thomas Catalino

DK 09:39 PM Software Development: RE: How Do I Get SD Memory Working for Critical Link Carrier Board From Linux: Mike,
The micro SD card is functioning with a FAT filesystem in our system. However, the write bandwith is slower then expected at 200KB/s. Writing the same file to RAM yields 14MB/s. Do you have any suggestions on increasing the s... david kasper

BR 08:25 AM FPGA Development: RE: FPGA example source: Hi Mike,
thanks for your response. I would like a simple gpio example for the fpga using the fpga_gpio.ko driver from your board support package. If I am able to toggle an IO pin it would be enough for this test.
I have tried to do... Brian Rasmussen
MW 07:28 AM FPGA Development: RE: FPGA example source: Hi Brian,
I can provide you with an example project if you are still stuck. Sorry for the delay. Please advise what you need.
-Mike
Michael Williamson
BR 08:08 AM Software Development: RE: Include Path / Where is the correct source files?: Hi Mike
Thanks for your response. I am trying to access the EMIF from my application. I will prefer not to write any drivers if possible... The information about "fopen" above is exactly what I'm looking for.
The next steps for a s... Brian Rasmussen
MW 07:26 AM Software Development: RE: Include Path / Where is the correct source files?: Hi Brian,
Are you trying to write a driver or trying to access the EMIF via your application? Typically, direct memory access must be handled by writing a driver (a kernel module) that supports actions such as mmap (memory mapping). ... Michael Williamson

BR 09:18 AM Software Development: Include Path / Where is the correct source files?: Hi
I am trying to interface to the FPGA on a MityDSP-L138 board. I have succeeded building a new kernel, inserting the "fpga_ctrl.ko" module into the kernel and loading the FPGA with the IndustrialIO.bin file from the wiki. The green... Brian Rasmussen

MW 02:13 PM Software Development: RE: dsplink debugging issue: Hi Susan,
It looks like Richard raised this issue on the TI E2E site, here:
http://e2e.ti.com/support/development_tools/code_composer_studio/f/81/t/57359.aspx
The solution appears to be to upgrade to DSPLINK 1.65. We're working... Michael Williamson

SB 09:39 AM Software Development: RE: dsplink debugging issue: Was this issue ever resolved? I am running into the same problem.
Thanks,
Susan Susan Begley

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Mity CPU Platforms » MityDSP-L138 (ARM9 Based Platforms)