From 4195b180fb19e220fe58e9649b501dc6ab284f49 Mon Sep 17 00:00:00 2001
From: Cormier,Jonathan <jcormier@criticallink.com>
Date: Tue, 29 Oct 2013 15:16:27 -0400
Subject: [PATCH 1/2] Skyline patch
 (cherry picked from commit 2221b5f4ba6da874737a49c5f79b23c9751c8af6)

Signed-off-by: Cormier,Jonathan <jcormier@criticallink.com>
---
 arch/arm/mach-omap2/baseboard-mityarm335x-devkit.c |   48 +++++++++++++++-----
 arch/arm/mach-omap2/board-mityarm335x.c            |    2 +-
 arch/arm/mach-omap2/devices.c                      |   21 +++++++-
 arch/arm/mach-omap2/mux33xx.c                      |   25 ++++++-----
 drivers/net/ethernet/ti/cpsw.c                     |    6 ++-
 5 files changed, 75 insertions(+), 27 deletions(-)

diff --git a/arch/arm/mach-omap2/baseboard-mityarm335x-devkit.c b/arch/arm/mach-omap2/baseboard-mityarm335x-devkit.c
index 956030c..424aa20 100644
--- a/arch/arm/mach-omap2/baseboard-mityarm335x-devkit.c
+++ b/arch/arm/mach-omap2/baseboard-mityarm335x-devkit.c
@@ -82,6 +82,19 @@ struct pinmux_config {
  *
  *****************************************************************************/
 
+static struct pinmux_config rmii2_pin_mux[] = {
+   {"gpmc_csn3.rmii2_crs_dv", AM33XX_PIN_INPUT_PULLUP},
+//    {"gpmc_wait0.rmii2_crs_dv", AM33XX_PIN_INPUT_PULLUP},
+    {"gpmc_a0.rmii2_txen",  AM33XX_PIN_OUTPUT}, // --
+    {"gpmc_a5.rmii2_txd0",   AM33XX_PIN_OUTPUT},  // --
+    {"gpmc_a4.rmii2_txd1",   AM33XX_PIN_OUTPUT}, // ---
+    {"gpmc_a11.rmii2_rxd0",  AM33XX_PIN_INPUT_PULLDOWN},  // --
+    {"gpmc_a10.rmii2_rxd1",  AM33XX_PIN_INPUT_PULLDOWN}, // --
+    {"mii1_col.rmii2_refclk",  AM33XX_PIN_INPUT_PULLDOWN},  // -- 
+    {"mdio_data.mdio_data", AM33XX_PIN_INPUT_PULLUP},
+    {"mdio_clk.mdio_clk",   AM33XX_PIN_OUTPUT_PULLUP},
+    {NULL, 0}
+};
 static struct pinmux_config rgmii2_pin_mux[] = {
 	{"gpmc_a0.rgmii2_tctl",	AM33XX_PIN_OUTPUT},
 	{"gpmc_a1.rgmii2_rctl",	AM33XX_PIN_INPUT_PULLDOWN},
@@ -101,6 +114,7 @@ static struct pinmux_config rgmii2_pin_mux[] = {
 };
 
 static struct pinmux_config lcdc_pin_mux[] = {
+#if 0 //danm
 	{"lcd_data0.lcd_data0",		AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
 	{"lcd_data1.lcd_data1",		AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
 	{"lcd_data2.lcd_data2",		AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA},
@@ -123,6 +137,7 @@ static struct pinmux_config lcdc_pin_mux[] = {
 	{"lcd_ac_bias_en.lcd_ac_bias_en", AM33XX_PIN_OUTPUT},
 	/* GPIO for the backlight */
 	{ "mcasp0_aclkx.gpio3_14", AM33XX_PIN_OUTPUT},
+#endif
 	{NULL, 0}
 };
 
@@ -133,8 +148,8 @@ static struct pinmux_config mmc0_pin_mux[] = {
 	{"mmc0_dat0.mmc0_dat0", AM33XX_PIN_INPUT_PULLUP},
 	{"mmc0_clk.mmc0_clk",   AM33XX_PIN_INPUT_PULLUP},
 	{"mmc0_cmd.mmc0_cmd",   AM33XX_PIN_INPUT_PULLUP},
-	{"mii1_txen.gpio3_3",	AM33XX_PIN_INPUT_PULLUP}, /* SD Card Detect */
-	{"mii1_col.gpio3_0",	AM33XX_PIN_INPUT_PULLUP}, /* SD Write Protect */
+// danm   {"mii1_txen.gpio3_3",   AM33XX_PIN_INPUT_PULLUP}, /* SD Card Detect */
+//    {"mii1_col.gpio3_0",    AM33XX_PIN_INPUT_PULLUP}, /* SD Write Protect */
 	{NULL, 0}
 };
 
@@ -169,12 +184,23 @@ static struct pinmux_config can_pin_mux[] = {
 };
 
 static struct pinmux_config expansion_pin_mux[] = {
-	{"uart0_ctsn.uart4_rxd", AM33XX_PIN_INPUT_PULLUP}, /* Exp0 RX */
-	{"uart0_rtsn.uart4_txd", AM33XX_PULL_ENBL}, /* Exp0 TX */
-	{"mii1_rxd3.uart3_rxd", AM33XX_PIN_INPUT_PULLUP}, /* Exp1 RX */
-	{"mii1_rxd2.uart3_txd", AM33XX_PULL_ENBL}, /* Exp1 TX */
-	{"mii1_rxd1.gpio2_20", AM33XX_PULL_ENBL}, /* Exp1 TX EN */
-	{"mii1_txclk.gpio3_9", AM33XX_PULL_ENBL}, /* Exp0 TX EN */
+	{"uart1_rxd.uart1_rxd", AM33XX_PIN_INPUT_PULLUP},/* Exp0 RX */
+	{"uart1_txd.uart1_txd", AM33XX_PULL_ENBL},     /* Exp0 TX */
+	{"mii1_rxd3.uart1_dtrn", AM33XX_PULL_ENBL},     /* uart 1 modem  */
+	{"mii1_rxclk..uart1_dsrn", AM33XX_PULL_ENBL},     /* */
+	{"mii1_txclk.uart1_dcdn", AM33XX_PULL_ENBL},     /* */
+
+	{"spi0_sclk.uart2_rxd", AM33XX_PIN_INPUT_PULLUP},/* Exp0 RX */
+	{"spi0_d0.uart2_txd", AM33XX_PULL_ENBL},     /* Exp0 TX */
+
+	{"spi0_cs1.uart3_rxd", AM33XX_PIN_INPUT_PULLUP},/*- Exp0 RX */
+	{"mii1_rxd2.uart3_txd", AM33XX_PULL_ENBL},     /* - Exp0 TX */
+
+	{"mii1_txd3.uart4_rxd", AM33XX_PIN_INPUT_PULLUP},/* - Exp0 RX */
+	{"mii1_txd2.uart4_txd", AM33XX_PULL_ENBL},     /* Exp0 TX */
+
+	{"lcd_data9.uart5_rxd", AM33XX_PIN_INPUT_PULLUP},/*-  Exp0 RX */
+	{"lcd_data8.uart5_txd", AM33XX_PULL_ENBL},     /*-  Exp0 TX */
 	{NULL, 0}
 };
 
@@ -252,8 +278,8 @@ static struct omap2_hsmmc_info mmc_info[] __initdata = {
 	{
 		.mmc		= 1,
 		.caps		= MMC_CAP_4_BIT_DATA,
-		.gpio_cd	= GPIO_TO_PIN(3, 3),
-		.gpio_wp	= GPIO_TO_PIN(3, 0),
+		.gpio_cd     = -EINVAL, // GPIO_TO_PIN(3, 3),
+		.gpio_wp    = -EINVAL, //GPIO_TO_PIN(3, 0),
 		.ocr_mask	= MMC_VDD_32_33 | MMC_VDD_33_34,
 	},
 	{
@@ -582,7 +608,7 @@ static int am335x_vsc8601_phy_fixup(struct phy_device *phydev)
 static __init void baseboard_setup_enet(void)
 {
 	/* pinmux */
-	setup_pin_mux(rgmii2_pin_mux);
+	setup_pin_mux(rmii2_pin_mux);
 
 	/* network configuration done in SOM code */
 	/* PHY address setup? */
diff --git a/arch/arm/mach-omap2/board-mityarm335x.c b/arch/arm/mach-omap2/board-mityarm335x.c
index 09902ed..cdb9e3e 100644
--- a/arch/arm/mach-omap2/board-mityarm335x.c
+++ b/arch/arm/mach-omap2/board-mityarm335x.c
@@ -821,7 +821,7 @@ static void __init mityarm335x_init(void)
 	omap_serial_init();
 	am335x_rtc_init();
 	clkout2_enable();
-	am33xx_cpsw_init(1); /* 1 == enable gigabit */
+	am33xx_cpsw_init(0);
 	mityarm335x_i2c_init();
 	omap_sdrc_init(NULL, NULL);
 	omap_board_config = mityarm335x_config;
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index cfc7ad5..be9cb52 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -1204,7 +1204,7 @@ static struct cpsw_slave_data am33xx_cpsw_slaves[] = {
 #ifdef CONFIG_BASEBOARD_MITYARM335X_TESTFIXTURE
 		.phy_id		= "0:01",
 #else
-		.phy_id		= "0:00",
+        .phy_id     = "0:01",
 #endif
 
 	},
@@ -1214,7 +1214,7 @@ static struct cpsw_slave_data am33xx_cpsw_slaves[] = {
 #ifdef CONFIG_BASEBOARD_MITYARM335X_TESTFIXTURE
 		.phy_id		= "0:00",
 #else
-		.phy_id		= "0:01",
+        .phy_id     = "0:00",
 #endif
 	},
 };
@@ -1233,7 +1233,7 @@ static struct cpsw_platform_data am33xx_cpsw_pdata = {
 	.bd_ram_size		= SZ_16K,
 	.rx_descs               = 64,
 	.mac_control            = BIT(5), /* MIIEN */
-	.gigabit_en		= 1,
+	.gigabit_en		= 0,
 	.host_port_num		= 0,
 	.no_bd_ram		= false,
 	.version		= CPSW_VERSION_2,
@@ -1407,6 +1407,21 @@ void am33xx_cpsw_init(unsigned int gigen)
 			am33xx_cpsw_slaves[0].mac_addr, ETH_ALEN);
 	platform_device_register(&am33xx_cpsw_mdiodevice);
 	platform_device_register(&am33xx_cpsw_device);
+
+#define MII_MODE_ENABLE     0x0
+#define RMII_MODE_ENABLE    0x4 //5
+#define RGMII_MODE_ENABLE   0xA
+#define MAC_MII_SEL     0x650
+#define SMA2_ADDR 0x1320
+
+	__raw_writel(RMII_MODE_ENABLE | 0xb0, //danm
+			AM33XX_CTRL_REGADDR(MAC_MII_SEL));
+
+	__raw_writel(0x0, //danm
+			AM33XX_CTRL_REGADDR(SMA2_ADDR));
+	printk("%s  gmii_sel 0x%x\n",__func__,
+			__raw_readl(AM33XX_CTRL_REGADDR(MAC_MII_SEL))); //danm
+
 	clk_add_alias(NULL, dev_name(&am33xx_cpsw_mdiodevice.dev),
 			NULL, &am33xx_cpsw_device.dev);
 }
diff --git a/arch/arm/mach-omap2/mux33xx.c b/arch/arm/mach-omap2/mux33xx.c
index d45e440..d74be55 100644
--- a/arch/arm/mach-omap2/mux33xx.c
+++ b/arch/arm/mach-omap2/mux33xx.c
@@ -1,3 +1,5 @@
+
+
 /*
  * AM33XX mux data
  *
@@ -132,7 +134,7 @@ static struct omap_mux __initdata am33xx_muxmodes[] = {
 		"gpmc_csn2", NULL, "mmc1_cmd", NULL,
 		NULL, NULL, NULL, "gpio1_31"),
 	_AM33XX_MUXENTRY(GPMC_CSN3, 0,
-		"gpmc_csn3", NULL, NULL, "mmc2_cmd",
+		"gpmc_csn3", NULL, "rmii2_crs_dv", "mmc2_cmd",
 		NULL, NULL, NULL, "gpio2_0"),
 	_AM33XX_MUXENTRY(GPMC_CLK, 0,
 		"gpmc_clk", "lcd_memory_clk_mux", NULL, "mmc2_clk",
@@ -175,10 +177,10 @@ static struct omap_mux __initdata am33xx_muxmodes[] = {
 		NULL, NULL, NULL, "gpio2_13"),
 	_AM33XX_MUXENTRY(LCD_DATA8, 0,
 		"lcd_data8", "gpmc_a12", NULL, "mcasp0_aclkx",
-		NULL, NULL, "uart2_ctsn", "gpio2_14"),
+		"uart5_txd", NULL, "uart2_ctsn", "gpio2_14"),
 	_AM33XX_MUXENTRY(LCD_DATA9, 0,
 		"lcd_data9", "gpmc_a13", NULL, "mcasp0_fsx",
-		NULL, NULL, "uart2_rtsn", "gpio2_15"),
+		"uart5_rxd", NULL, "uart2_rtsn", "gpio2_15"),
 	_AM33XX_MUXENTRY(LCD_DATA10, 0,
 		"lcd_data10", "gpmc_a14", NULL, "mcasp0_axr0",
 		NULL, NULL, NULL, "gpio2_16"),
@@ -221,11 +223,11 @@ static struct omap_mux __initdata am33xx_muxmodes[] = {
 	_AM33XX_MUXENTRY(MMC0_DAT0, 0,
 		"mmc0_dat0", NULL, NULL, NULL,
 		NULL, NULL, NULL, "gpio2_29"),
-	_AM33XX_MUXENTRY(MMC0_CLK, 0,
-		"mmc0_clk", NULL, NULL, NULL,
+	_AM33XX_MUXENTRY(MMC0_CLK, 0,   // skyline danm
+		"mmc0_clk", "gpmc_a24", "uart3_ctsn", "uart2_rxd",
 		NULL, NULL, NULL, "gpio2_30"),
-	_AM33XX_MUXENTRY(MMC0_CMD, 0,
-		"mmc0_cmd", NULL, NULL, NULL,
+	_AM33XX_MUXENTRY(MMC0_CMD, 0,   // skyline danm
+		"mmc0_cmd", "gpmc_a25", "uart3_rtsn", "uart2_txd",
 		NULL, NULL, NULL, "gpio2_31"),
 	_AM33XX_MUXENTRY(MII1_COL, 0,
 		"mii1_col", "rmii2_refclk", "spi1_sclk", NULL,
@@ -243,10 +245,10 @@ static struct omap_mux __initdata am33xx_muxmodes[] = {
 		"mii1_rxdv", NULL, "rgmii1_rctl", NULL,
 		"mcasp1_aclx", "mmc2_dat0", "mcasp0_aclkr", "gpio3_4"),
 	_AM33XX_MUXENTRY(MII1_TXD3, 0,
-		"mii1_txd3", "d_can0_tx", "rgmii1_td3", NULL,
+		"mii1_txd3", "d_can0_tx", "rgmii1_td3", "uart4_rxd",
 		"mcasp1_fsx", "mmc2_dat1", "mcasp0_fsr", "gpio0_16"),
 	_AM33XX_MUXENTRY(MII1_TXD2, 0,
-		"mii1_txd2", "d_can0_rx", "rgmii1_td2", NULL,
+		"mii1_txd2", "d_can0_rx", "rgmii1_td2", "uart4_txd",
 		"mcasp1_axr0", "mmc2_dat2", "mcasp0_ahclkx", "gpio0_17"),
 	_AM33XX_MUXENTRY(MII1_TXD1, 0,
 		"mii1_txd1", "rmii1_txd1", "rgmii1_td1", "mcasp1_fsr",
@@ -256,10 +258,10 @@ static struct omap_mux __initdata am33xx_muxmodes[] = {
 		"mcasp1_aclkr", NULL, "mmc1_clk", "gpio0_28"),
 	_AM33XX_MUXENTRY(MII1_TXCLK, 0,
 		"mii1_txclk", NULL, "rgmii1_tclk", "mmc0_dat7",
-		"mmc1_dat0", NULL, "mcasp0_aclkx", "gpio3_9"),
+		"mmc1_dat0", "uart1_dcdn", "mcasp0_aclkx", "gpio3_9"),
 	_AM33XX_MUXENTRY(MII1_RXCLK, 0,
 		"mii1_rxclk", NULL, "rgmii1_rclk", "mmc0_dat6",
-		"mmc1_dat1", NULL, "mcasp0_fsx", "gpio3_10"),
+		"mmc1_dat1", "uart1_dsrn", "mcasp0_fsx", "gpio3_10"),
 	_AM33XX_MUXENTRY(MII1_RXD3, 0,
 		"mii1_rxd3", "uart3_rxd", "rgmii1_rd3", "mmc0_dat5",
 		"mmc1_dat2", "uart1_dtrn", "mcasp0_axr0", "gpio2_18"),
@@ -617,3 +619,4 @@ int __init am33xx_mux_init(struct omap_board_mux *board_subset)
 	return 0;
 }
 #endif
+ 
diff --git a/drivers/net/ethernet/ti/cpsw.c b/drivers/net/ethernet/ti/cpsw.c
index 3092588..ad54562 100644
--- a/drivers/net/ethernet/ti/cpsw.c
+++ b/drivers/net/ethernet/ti/cpsw.c
@@ -448,7 +448,7 @@ static void _cpsw_adjust_link(struct cpsw_slave *slave,
 			mac_control |= BIT(15);
 		if (phy->duplex)
 			mac_control |= BIT(0);	/* FULLDUPLEXEN	*/
-		if (phy->interface == PHY_INTERFACE_MODE_RGMII) /* RGMII */
+		if (phy->interface == PHY_INTERFACE_MODE_RMII) /* RGMII */
 			mac_control |= (BIT(15)|BIT(16));
 		*link = true;
 	} else {
@@ -457,6 +457,9 @@ static void _cpsw_adjust_link(struct cpsw_slave *slave,
 		mac_control = 0;
 	}
 
+  //  printk("danm 2 - mac control 0x%x 0x%p slave num %x, slave port 0x%x\n",mac_control,
+  // danm             &slave->sliver->mac_control,slave->slave_num,slave_port);
+
 	if (mac_control != slave->mac_control) {
 		phy_print_status(phy);
 		__raw_writel(mac_control, &slave->sliver->mac_control);
@@ -571,6 +574,7 @@ static void cpsw_set_phy_config(struct cpsw_priv *priv, struct phy_device *phy)
 		return;
 
 	phy_addr = phy->addr;
+	phy->interface = PHY_INTERFACE_MODE_RMII;
 
 	/* Disable 1 Gig mode support if it is not supported */
 	if (!pdata->gigabit_en)
-- 
1.7.0.4

