diff --git a/arch/arm64/boot/dts/qcom/qcm6490.dtsi b/arch/arm64/boot/dts/qcom/qcm6490.dtsi
index bac8bc4af172..d305a4362b2c 100644
--- a/arch/arm64/boot/dts/qcom/qcm6490.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcm6490.dtsi
@@ -597,7 +597,7 @@ &swr2 {
 };
 
 &tlmm {
-	gpio-reserved-ranges = <32 2>, <48 4>;
+	gpio-reserved-ranges = <32 2>;
 };
 
 &video_mem {
diff --git a/arch/arm64/boot/dts/qcom/mitysom-qc6490-carrier.dts b/arch/arm64/boot/dts/qcom/mitysom-qc6490-carrier.dts
new file mode 100644
index 000000000000..dc8e076e6343
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/mitysom-qc6490-carrier.dts
@@ -0,0 +1,552 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2026 Lab 308 LLC. All rights reserved.
+ */
+
+/*
+ * The MitySOM-QCxxxx baseboard presents the following interfaces and controllers to 
+ * the SOM:
+ * GPIO based:
+ * Pushbuttons:
+ * - [GPIO_82]   J1-E10 Force USB Boot_
+ * 
+ * LEDS
+ * - [GPIO_3]    J2-B2 LED1
+ * - [GPIO_6]    J2-B3 LED2
+ * 
+ * UART
+ * - [GPIO_58 Q1-6-L2] UTX_CAM0 : uart14
+ * - [GPIO_59 Q1-6-L3] URX_CAM0
+ * - [GPIO_54 Q1-5-L2] UTX_CAM1 : uart13
+ * - [GPIO_55 Q1-5-L3] URX_CAM1
+ * - [GPIO_46 Q1-3-L2] UTX_CAM2 : uart11
+ * - [GPIO_47 Q1-3-L3] URX_CAM2
+ * - [GPIO_42 Q1-2-L2] UTX_CAM3 : uart10
+ * - [GPIO_43 Q1-2-L3] URX_CAM3
+ * - [GPIO_38 Q1-1-L2] UTX_GPS : uart9
+ * - [GPIO_39 Q1-1-L3] URX_GPS
+ * 
+ * I2C
+ * - [GPIO_4 LQ-2-L0] RTC_I2C_SDA : i2c??
+ * - [GPIO_5 LQ-2-L1] RTC_I2C_SCL
+ * 
+ * SPI
+ * - [GPIO_48 Q1-4-L0] SPI2_MISO : spi12
+ * - [GPIO_49 Q1-4-L1] SPI2_MOSI
+ * - [GPIO_50 Q1-4-L2] SPI2_CLK
+ * - [GPIO_51 Q1-4-L3] SPI2_CS
+ * 
+ * IMU
+ * - [GPIO_110] IMU_DRDY
+ * - [GPIO_116] IMU_RESETn
+ *
+ * Power Control
+ * - [GPIO_40 Q1-2-L0] J1-E17 CAM_12V_EN
+ *
+ * uSD Card interface [SDC2]
+ * - [GPIO_91] J2-G6 SD-DETECT_
+ *
+ * eMMC Interface [SDC1]
+ * - [GPIO_52 Q1-5-L0] J1-E1 EMMC-RSTn
+ *
+ * UART console
+ * - [Q0-5-L2] DEBUG-TX
+ * - [Q0-5-L3] DEBUG-RX
+ * 
+ * PCIE0 (x1) - Ethernet
+ * - [GPIO_87] - J2-F14 PCIE0-RESn
+ * - [GPIO_88] - J2-A17 PCIE0-CLKREQn
+ * - [GPIO_89] - J2-G14 PCIE0-WAKEn
+ * 
+ */
+/dts-v1/;
+
+#include "mitysom-qc6490.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/leds/common.h>
+
+&tlmm {
+	gpio-line-names = "GPIO_0",
+		"GPIO_1",
+		"GPIO_2",
+		"LED1_EN",
+		"RTC_I2C_SDA",
+		"RTC_I2C_SCL",
+		"LED2_EN",
+		"GPIO_7",
+		"GPIO_8",
+		"GPIO_9",
+		"GPIO_10",
+		"GPIO_11",
+		"GPIO_12",
+		"GPIO_13",
+		"GPIO_14",
+		"GPIO_15",
+		"GPIO_16",
+		"GPIO_17",
+		"GPIO_18",
+		"GPIO_19",
+		"GPIO_20",
+		"GPIO_21",
+		"GPIO_22",
+		"GPIO_23",
+		"GPIO_24",
+		"GPIO_25",
+		"GPIO_26",
+		"GPIO_27",
+		"GPIO_28",
+		"GPIO_29",
+		"GPIO_30",
+		"GPIO_31",
+		"GPIO_32",
+		"GPIO_33",
+		"GPIO_34",
+		"GPIO_35",
+		"GPIO_36",
+		"GPIO_37",
+		"UTX_GPS",
+		"URX_GPS",
+		"CAM_12V_EN",
+		"GPIO_41",
+		"UTX_CAM3",
+		"URX_CAM3",
+		"GPIO_44",
+		"GPIO_45",
+		"UTX_CAM2",
+		"URX_CAM2",
+		"SPI2_MISO",
+		"SPI2_MOSI",
+		"SPI2_CLK",
+		"SPI2_CS",
+		"EMMC-RSTn",
+		"GPIO_53",
+		"UTX_CAM1",
+		"URX_CAM1",
+		"GPIO_56",
+		"GPIO_57",
+		"UTX_CAM0",
+		"URX_CAM0",
+		"GPIO_60",
+		"GPIO_61",
+		"GPIO_62",
+		"GPIO_63",
+		"GPIO_64",
+		"GPIO_65",
+		"GPIO_66",
+		"GPIO_67",
+		"GPIO_68",
+		"GPIO_69",
+		"GPIO_70",
+		"GPIO_71",
+		"GPIO_72",
+		"GPIO_73",
+		"GPIO_74",
+		"GPIO_75",
+		"GPIO_76",
+		"GPIO_77",
+		"GPIO_78",
+		"GPIO_79",
+		"GPIO_80",
+		"GPIO_81",
+		"ForceUSBBoot",
+		"GPIO_83",
+		"GPIO_84",
+		"GPIO_85",
+		"GPIO_86",
+		"PCIE0-RESn",
+		"PCIE0-CLKREQn",
+		"PCIE0-WAKEn",
+		"GPIO_90",
+		"SD-DETECT",
+		"GPIO_92",
+		"GPIO_93",
+		"GPIO_94",
+		"GPIO_95",
+		"GPIO_96",
+		"GPIO_97",
+		"GPIO_98",
+		"GPIO_99",
+		"GPIO_100",
+		"GPIO_101",
+		"GPIO_102",
+		"GPIO_103",
+		"GPIO_104",
+		"GPIO_105",
+		"GPIO_106",
+		"GPIO_107",
+		"GPIO_108",
+		"GPIO_109",
+		"IMU_DRDY",
+		"GPIO_111",
+		"GPIO_112",
+		"GPIO_113",
+		"GPIO_114",
+		"GPIO_115",
+		"IMU_RESETn",
+		"GPIO_117",
+		"GPIO_118",
+		"GPIO_119",
+		"GPIO_120",
+		"GPIO_121",
+		"GPIO_122",
+		"GPIO_123",
+		"GPIO_124",
+		"GPIO_125",
+		"GPIO_126",
+		"GPIO_127",
+		"GPIO_128",
+		"GPIO_129",
+		"GPIO_130",
+		"GPIO_131",
+		"GPIO_132",
+		"GPIO_133",
+		"GPIO_134",
+		"GPIO_135",
+		"GPIO_136",
+		"GPIO_137",
+		"GPIO_138",
+		"GPIO_139",
+		"GPIO_140",
+		"GPIO_141",
+		"GPIO_142",
+		"GPIO_143",
+		"GPIO_144",
+		"GPIO_145",
+		"GPIO_146",
+		"GPIO_147",
+		"GPIO_148",
+		"GPIO_149",
+		"GPIO_150",
+		"GPIO_151",
+		"GPIO_152",
+		"GPIO_153",
+		"GPIO_154",
+		"GPIO_155",
+		"GPIO_156",
+		"GPIO_157",
+		"GPIO_158",
+		"GPIO_159",
+		"GPIO_160",
+		"GPIO_161",
+		"GPIO_162",
+		"GPIO_163",
+		"GPIO_164",
+		"GPIO_165",
+		"GPIO_166",
+		"GPIO_167",
+		"GPIO_168",
+		"GPIO_169",
+		"GPIO_170",
+		"GPIO_171",
+		"GPIO_172",
+		"GPIO_173",
+		"GPIO_174";
+};
+
+/ {
+	model = "Critical Link MitySOM-QC6490";
+	compatible = "qcom,qcm6490";
+	qcom,board-id = <32 0x1>, <32 0x601>;
+
+	/* DC input 12VDC */
+	reg_12v0: reg_12v0 {
+		compatible = "regulator-fixed";
+		regulator-name = "reg_12v0";
+		regulator-min-microvolt = <12000000>;
+		regulator-max-microvolt = <12000000>;
+		regulator-always-on;
+		regulator-boot-on;
+	};
+
+	reg_3v3: reg_3v3a {
+		compatible = "regulator-fixed";
+		regulator-name = "reg_3v3a";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		regulator-always-on;
+		regulator-boot-on;
+		vin-supply = <&vcc_vbat>; 
+	};
+
+	vcc_vbat: vcc_vbat {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc_vbat";
+		regulator-min-microvolt = <3700000>;
+		regulator-max-microvolt = <3700000>;
+		regulator-always-on;
+		regulator-boot-on;
+	};
+	
+	user-leds {
+		compatible = "gpio-leds";
+		extled1 {
+			gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>;
+			color = <LED_COLOR_ID_RED>;
+			default-state = "off";
+			label = "extled1";
+		};
+		extled2 {
+			gpios = <&tlmm 6 GPIO_ACTIVE_HIGH>;
+			color = <LED_COLOR_ID_RED>;
+			default-state = "on";
+			label = "extled2";
+	    };
+	};
+};
+
+&uart5 {
+	compatible = "qcom,geni-debug-uart";
+	status = "okay";
+};
+
+&ufs_mem_hc {
+	reset-gpios = <&tlmm 175 GPIO_ACTIVE_LOW>;
+	vcc-supply = <&vreg_l7b_2p952>;
+	vcc-max-microamp = <800000>;
+	vccq-supply = <&vreg_l9b_1p2>;
+	vccq-max-microamp = <900000>;
+	vccq2-supply = <&vreg_l9b_1p2>;
+	vccq2-max-microamp = <900000>;
+
+	status = "okay";
+};
+
+&ufs_mem_phy {
+	vdda-phy-supply = <&vreg_l10c_0p88>;
+	vdda-pll-supply = <&vreg_l6b_1p2>;
+
+	status = "okay";
+};
+
+&sdc1_clk {
+	bias-disable;
+	drive-strength = <16>;
+};
+
+&sdc1_cmd {
+	bias-pull-up;
+	drive-strength = <10>;
+};
+
+&sdc1_data {
+	bias-pull-up;
+	drive-strength = <10>;
+};
+
+&sdhc_1 {
+	bus-width = <4>;
+ 	status = "okay";
+
+	/* for rev-1 version, clock is not looped back, disable higher speed modes */
+	/delete-property/ mmc-ddr-1_8v;
+	/delete-property/ mmc-hs200-1_8v;
+	/delete-property/ mmc-hs400-1_8v;
+	/delete-property/ mmc-hs400-enhanced-strobe;
+
+	pinctrl-0 = <&sdc1_clk>, <&sdc1_cmd>, <&sdc1_data>;
+	pinctrl-1 = <&sdc1_clk_sleep>, <&sdc1_cmd_sleep>, <&sdc1_data_sleep>;
+};
+
+&sdhc_2 {
+	status = "okay";
+	cd-gpios = <&tlmm 91 GPIO_ACTIVE_LOW>;
+};
+
+&vreg_l7b_2p952 {
+	/delete-property/regulator-min-microvolt;
+	/delete-property/regulator-max-microvolt;
+	regulator-allow-set-load;
+	regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM RPMH_REGULATOR_MODE_HPM>;
+};
+
+&vreg_l9b_1p2 {
+	/delete-property/regulator-min-microvolt;
+	/delete-property/regulator-max-microvolt;
+	regulator-allow-set-load;
+	regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM RPMH_REGULATOR_MODE_HPM>;
+};
+
+&sdc2_clk {
+	bias-disable;
+	drive-strength = <16>;
+};
+
+&sdc2_cmd {
+	bias-pull-up;
+	drive-strength = <10>;
+};
+
+&sdc2_data {
+	bias-pull-up;
+	drive-strength = <10>;
+};
+
+&tlmm {
+	sd_cd: sd-cd-state {
+		pins = "gpio91";
+		function = "gpio";
+		bias-pull-up;
+	};
+};
+
+&soc {
+
+	connector_usb2: connector_usb2 {
+		compatible = "gpio-usb-b-connector";
+		vbus-supply = <&vcc_vbat>;
+
+		pinctrl-names = "default";
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@0 {
+				reg = <0>;
+				usb2_port_connector: endpoint {
+					remote-endpoint = <&usb2_port>;
+				};
+			};
+		};
+	};
+};
+
+&pcie0 {
+	status = "okay";
+};
+
+&pcie0_phy {
+	status = "okay";
+};
+
+/* Baseboard Power Control GPIOS */
+/*
+ * - [GPIO_40]  J1-E17 CAM_12V_EN
+*/
+&tlmm {
+	dk-gpio40 {
+		pins = "gpio40";
+		function = "gpio";
+		output-high;
+		bias-disable;
+	};
+};
+
+/*&i2c?? {
+	status = "okay";
+
+	bme280@76 {
+		compatible = "bosch,bme280";
+		reg = <0x76>;
+	};
+
+	rtc@52 {
+		compatible = "microcrystal,rv3028";
+		reg = <0x52>;
+		enable-level-switching-mode;
+		status = "okay";
+	};
+};*/
+
+&spi12 {
+	status = "okay";
+
+	imu@0 {
+		compatible = "murata,sch16xx";
+		reg = <0>;
+		spi-max-frequency = <10000000>;
+		sync-gpio = <&tlmm 110 GPIO_ACTIVE_LOW>;
+		reset-gpio = <&tlmm 116 GPIO_ACTIVE_LOW>;
+	};
+};
+
+&uart9 {
+	status = "okay";
+};
+
+&uart10 {
+	status = "okay";
+};
+
+&uart11 {
+	status = "okay";
+};
+
+&uart13 {
+	status = "okay";
+};
+
+&uart14 {
+	status = "okay";
+};
+
+&qup_uart9_rx {
+	drive-strength = <2>;
+	bias-pull-up;
+};
+
+&qup_uart9_tx {
+	drive-strength = <2>;
+	bias-disable;
+};
+
+&qup_uart10_rx {
+	drive-strength = <2>;
+	bias-pull-up;
+};
+
+&qup_uart10_tx {
+	drive-strength = <2>;
+	bias-disable;
+};
+
+&qup_uart11_rx {
+	drive-strength = <2>;
+	bias-pull-up;
+};
+
+&qup_uart11_tx {
+	drive-strength = <2>;
+	bias-disable;
+};
+
+&qup_uart13_rx {
+	drive-strength = <2>;
+	bias-pull-up;
+};
+
+&qup_uart13_tx {
+	drive-strength = <2>;
+	bias-disable;
+};
+
+&qup_uart14_rx {
+	drive-strength = <2>;
+	bias-pull-up;
+};
+
+&qup_uart14_tx {
+	drive-strength = <2>;
+	bias-disable;
+};
+
+/*&remoteproc_adsp {
+	firmware-name = "qcom/qcs6490/adsp.mdt";
+	status = "disabled";
+};
+
+&remoteproc_cdsp {
+	firmware-name = "qcom/qcs6490/cdsp.mdt";
+	status = "disabled";
+};
+
+&remoteproc_mpss {
+	firmware-name = "qcom/qcs6490/modem.mdt";
+	status = "disabled";
+};
+
+&remoteproc_wpss {
+	firmware-name = "qcom/qcs6490/wpss.mdt";
+	status = "disabled";
+};*/
